Abstract: A method of forming a semiconductor device includes etching trenches in a substrate to form fin structures, depositing a liner layer to line the trenches, filling the trenches with an insulating layer, performing an ion implantation process to the insulating layer, after performing the ion implantation process, recessing the insulating layer to form shallow trench isolation (STI) regions adjacent the fin structures, and forming a gate crossing the fin structures.

Abstract: A cover for an infrared detector and a method of fabricating the cover are disclosed. The cover comprises a wafer comprising a material such as silicon that transmits infrared radiation. The wafer has a first surface and a second surface opposite the first surface. An antireflective region is formed in the wafer to enhance transmission of infrared radiation through the cover. The antireflective region comprises a first plurality of antireflective elements such as moth-eyes formed in the first surface. The first plurality of antireflective elements are sized and shaped and arranged relative to one another to form a region of graded refractive index at the first surface so as to reduce the amount of infrared radiation reflected by the cover at the antireflective region. The cover comprises a wall extending from the first surface and surrounding the antireflective region.

Abstract: A micro-LED structure includes a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extends along a horizontal level from an edge of the first type conductive layer. An edge of the light emitting layer is aligned with an edge of the second type conductive layer. The edge of the second type conductive layer extends along the horizontal level away from the edge of the first type conductive layer.

Abstract: A display panel manufacturing method includes the following steps: providing a first signal pad on a first face of a substrate; providing a second signal pad on a second face of the substrate; providing a conductive member that contacts each of the first signal pad, the second signal pad, and a third face of the substrate; providing a photoresist pattern that partially covers the conductive member and overlaps each of the first signal pad, the second signal pad, and the third face of the substrate; pre-curing the photoresist member; forming a signal line by etching the conductive member; and curing the photoresist member to form a cured photoresist member. The cured photoresist member covers an edge of the signal line.

Abstract: A light emitting element of the present disclosure includes a first substrate 41 and a second substrate 42, a light emitting unit 30 provided above the first substrate 41, a first microlens 51 formed above the light emitting unit 30 and having a convex shape toward the second substrate 42, a second microlens 52 provided on the second substrate 42 and having a convex shape toward the first microlens 51, and a bonding member 35 interposed between the first microlens 51 and the second microlens 52.

Abstract: A display device includes: a substrate; a first transistor and a second transistor disposed on the substrate; a first electrode and a second electrode, wherein the first electrode is electrically connected to the first transistor through a first via hole, and the second electrode is electrically connected to the second transistor through a second via hole; a first signal line disposed on the substrate and overlapped with the first electrode and the second electrode; and a second signal line disposed on the substrate and adjacent to the first signal line, wherein the first signal line and the second signal line extend along a first direction, wherein a distance between the first via hole and the second via hole along the first direction is greater than a distance between the first signal line and the second signal line along a second direction different the first direction.

Abstract: A display device includes: a substrate; a first transistor and a second transistor disposed on the substrate; a first electrode and a second electrode, wherein the first electrode is electrically connected to the first transistor through a first via hole, and the second electrode is electrically connected to the second transistor through a second via hole; a first signal line disposed on the substrate and overlapped with the first electrode and the second electrode; and a second signal line disposed on the substrate and adjacent to the first signal line, wherein the first signal line and the second signal line extend along a first direction, wherein a distance between the first via hole and the second via hole along the first direction is greater than a distance between the first signal line and the second signal line along a second direction different the first direction.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate and a word line (WL) structure, wherein the substrate includes trenches arranged in parallel intervals; the WL structure is located in the trenches, and includes a dielectric layer and a conductive layer; the dielectric layer covers a bottom surface and a sidewall of the conductive layer; the conductive layer includes a first conductive layer and a second conductive layer; and a first component is doped in the second conductive layer.

Abstract: A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. The micro-LED chip further includes: a top spacer formed on a top surface of the light emitting layer; a bottom spacer formed on a bottom surface of the light emitting layer; and an isolation structure formed between adjacent micro-LEDs.

Abstract: A method includes bonding a package component to a composite carrier. The composite carrier includes a base carrier and an absorption layer, and the absorption layer is between the base carrier and the package component. A laser beam is projected onto the composite carrier. The laser beam penetrates through the base carrier to ablate the absorption layer. The base carrier may then be separated from the package component.

Abstract: A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. The micro-LED chip further includes: a top spacer formed on a top surface of the light emitting layer; a bottom spacer formed on a bottom surface of the light emitting layer; and an isolation structure formed between adjacent micro-LEDs.

Abstract: A display substrate, a method for manufacturing the display substrate, and a display apparatus are provided. The display substrate includes: a base substrate; a partition structure, where the partition structure has a first side and a second side opposite to each other; and a light guide structure arranged proximate to the partition structure. At least one light guide structure is located on the first side of the partition structure and configured to guide a light onto a part, which faces the light guide structure, of a side surface of the partition structure on the first side; and the partition structure has a first inclined side surface located on the first side, where the first inclined side surface extends distally from the base substrate and is inclined away from the second side, and a first space is formed between the first inclined side surface and the base substrate.

Abstract: The disclosure belongs to the field of microelectronics, and specifically, relates to a method of inducing crystallization of a chalcogenide phase-change material and application thereof. To be specific, a dielectric material is brought into contact with an interface of the chalcogenide phase-change material. The dielectric material is in an octahedral configuration, and the dielectric material provides a crystal nucleus growth center for the crystallization of the chalcogenide phase-change material at the interface between the two, so as to induce the phase-change material to accelerate the crystallization. The method is further applied in a phase-change memory cell. Among all the dielectric material layers in contact with the chalcogenide phase-change material layer, the dielectric material structure of at least one side of the dielectric material layer is an octahedral configuration.

Abstract: A semiconductor device including a drift region and a buffer region is provided. The drift region of a first conductivity type is provided in a semiconductor substrate. The buffer region of the first conductivity type includes at least six peaks in a doping concentration distribution in a depth direction of the semiconductor substrate. A curve connecting the at least six peaks includes an upwardly-convex portion.

Abstract: A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. The micro-LED chip further comprises: a top spacer formed on a top surface of the light emitting layer; a bottom spacer formed on a bottom surface of the light emitting layer; and an isolation structure formed between adjacent micro-LEDs.

Abstract: A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. A bottom edge of the second type conductive layer is aligned with a top edge of the first type conductive layer.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a sub-pixel unit, a data line, a scan line, a plurality of test contact pads, a first peripheral-zone insulating layer and an auxiliary electrode layer. The base substrate includes a display zone and a peripheral zone, the peripheral zone including a test bonding zone. Each of the plurality of the test contact pads includes a first test-contact-pad metal layer and a second test-contact-pad metal layer, wherein the second test-contact-pad metal layer covers the first test-contact-pad metal layer and contacts the first test-contact-pad metal layer in at least portion of a periphery of the first test-contact-pad metal layer. The auxiliary electrode layer includes a plurality of first relay electrode patterns located within the test bonding zone and a plurality of auxiliary electrodes located within the display zone.

Abstract: A semiconductor device includes a first power supply line, a second power supply line, a first ground line, a switch circuit connected to the first and the second power supply line, and a switch control circuit connected to the first ground line and the first power supply line. The switch circuit includes a first and a second transistor of a first conductive type. A first gate electrode of the first transistor is connected to a second gate electrode of the second transistor. The switch control circuit includes a third transistor of a second conductive type, and a fourth transistor of a third conductive type. A third gate electrode of the third transistor is connected to a fourth gate electrode of the fourth transistor. A semiconductor device includes a signal line that electrically connects a connection point between the third and fourth transistor to the first and second gate electrode.

Abstract: An integrated photodetecting semiconductor optoelectronic component for measuring the intensity of each of the two colour constituents of dichromatic light irradiating the optoelectronic component includes a first SPAD and a second SPAD that detect photons over a broad range of wavelengths. The component also includes a semiconductor optical longpass filter that at least partially covers an active surface area of the first SPAD. The longpass filter is permissive to a first one of the two colour constituents of the dichromatic light and blocking the second one of the two colour constituents of the dichromatic light. The component further includes electronic circuitry for the readout and processing of detection signals delivered by the first and second SPAD. The electronic circuitry is adapted to provide a first intensity output signal and a second intensity output signal via a differential analysis based on the detection signals delivered by the first and second SPAD.

Abstract: A process for fabricating a substrate for a radiofrequency device includes providing a piezoelectric substrate and a carrier substrate, depositing a dielectric layer on a surface of the piezoelectric substrate, assembling together the piezoelectric substrate and the carrier substrate with a polymerizable adhesive directly between the dielectric layer and the carrier substrate to form an assembled substrate, and polymerizing the polymerizable adhesive layer to form a polymerized layer bonding the piezoelectric substrate to the carrier substrate, the polymerized layer and the dielectric layer together forming an electrically insulating layer between the piezoelectric substrate and the carrier substrate.