Abstract: An integrated circuit die having silicon on insulator (SOI) structure is analyzed in a manner that enhances the ability to detect photoemissions from the die. According to an example embodiment of the present invention, one of two or more lenses having a higher relative photon count is identified and used to analyze a semiconductor die. The die has at least a portion of the insulator of the SOI structure exposed, and photon emissions are detected using each lens via the exposed insulator in response to the die being stimulated. The number of photons detected using each lens is compared, and the lens having a higher photon count rate is identified, optimizing the photon count for the particular type of die preparation used to expose the insulator. The identified lens is then used with the high-speed detector to detect photoemissions from the die, and the detected photoemissions are used to analyze the die.

Abstract: Chalcopyrite semiconductors, such as thin films of copper-indium-diselenide (CuInSe2), copper-gallium-diselenide (CuGaSe2), and Cu(Inx,Ga1-x)Se2, all of which are sometimes generically referred to as CIGS, have become the subject of considerable interest and study for semiconductor devices in recent years. They are of particular interest for photovoltaic device or solar cell absorber applications. The quality of Cu(In,Ga)Se2 thin films, as an example of chalcopyrite films, is controlled by making spectrophotometric measurements of light reflected from the film surface. This permits the result of non-contacting measurements of films in a continuous production environment to be fed back to adjust the production conditions in order to improve or maintain the quality of subsequently produced film.

Abstract: A flip chip interconnected structure comprises a chip having an active surface in which a plurality of bonding pads are formed on the active surface of the chip. A substrate has a surface and a chip locating region. The chip locating region is on the surface of the substrate and a plurality of nodes are formed on the chip locating region. A plurality of solder balls are respectively connected to the bonding pads and the nodes. The solder balls have various sizes. The chip is bonded to the chip locating region of the substrate by the solder balls.