Abstract: A method and apparatus for minimizing direct coupling between transmitters and receivers on a downhole logging tool are disclosed. One embodiment includes a transmitter, a bucking device, and a plurality of receivers, where signals may be directly coupled from the transmitter into the receivers and signals may be indirectly coupled from the transmitter into the receivers through the formation and borehole environment. The bucking device minimizes the magnitude of the signals that are directly coupled from the transmitter into multiple receivers within the plurality. By varying the current in the bucking device, the bucking device minimizes the magnitude of the directly coupled signal of each receiver in the plurality, and each receiver may utilize a common bucking device.
Abstract: A system and method for generating an illumination intensity profile of an illuminator that forms part of a projection lithography system. Radiation from the illuminator is projected towards an illumination profile mask having a plurality of apertures such that each aperture passes a distinct portion of the radiation. The intensity of each of the distinct portions of radiation is detected and assembled to form the illumination intensity profile.
Type:
Grant
Filed:
April 28, 2004
Date of Patent:
April 11, 2006
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Christopher A. Spence, Todd P. Lukanc, Luigi Capodieci, Joerg Reiss, Sarah N. McGowan
Abstract: An optical scanning apparatus that includes a light source, a polygon mirror for deflecting a plurality of light beams emitted from the light source, and an image focusing system for causing the light beams deflected by the polygon mirror to form spots on surfaces of a plurality of photosensitive drums, wherein the image focusing system is disposed between the polygon mirror and the photosensitive drums, and includes scanning lenses for causing the beams deflected by the polygon mirror to form spots on the respective surfaces of the photosensitive drums, and the central axes of the scanning lenses are spaced a predetermined distance from optical axes extended from the center of the light source.
Abstract: An apparatus for inspecting a metallic post contoured in a single dimension for defects. The apparatus has a clamp having at least one jaw with a surface conforming to the contour to the metallic post. The conforming jaw or jaws also have a plurality of eddy current coils and the probe has at least one sensor configured to sense at least one of position or motion.
Type:
Grant
Filed:
March 19, 2004
Date of Patent:
April 11, 2006
Assignee:
General Electric Company
Inventors:
Robert Martin Roney, Jr., Thomas Francis Murphy
Abstract: The image forming apparatus has a communicating portion from the first chamber 24 to the second chamber 25, and a communicating portion from the first chamber 24 to the third chamber 26, which are separated from each other. With this structure, an active flow of fresh toner into the third chamber 26, where a developer having a low toner ratio and low toner concentration is stirred together with recycle toner during an image forming operation is suppressed.
Abstract: An NMR apparatus, sample contained in a sample holder is ejected from an NMR probe to the top of the magnet region where a sample latching mechanism holds the sample in place without requiring a continuing flow of pressurized gas, electrical power or other outside force. The sample can then be removed and/or exchanged with another sample that is also held in place without the expenditure of gas. When ready the operator depresses a lever arm enabling the exchanged sample to move into the probe.
Abstract: A method of ink level determination for multiple ink chambers includes the steps of determining a first estimated amount of a first ink in a first ink chamber; determining a second estimated amount of a second ink in a second ink chamber; measuring an amount of the second ink contained in the second ink chamber; determining an actual ink loss for the second ink chamber by finding a difference between the amount of the second ink measured in the second ink chamber and the second estimated amount of the second ink in the second ink chamber; and modifying the first estimated amount of the first ink in the first ink chamber using the actual ink loss for the second ink chamber to form a compensated first ink amount.
Abstract: A method of connecting a plurality of probe pins to a plurality of first external connection pads, which are provided on a head gimbal assembly and are electrically connected to a plurality of terminal electrodes of a write magnetic head element, respectively, and a plurality of second external connection pads, which are provided on the head gimbal assembly and are electrically connected to a plurality of terminal electrodes of a read magnetic head element. In the connection method, an approach direction of the probe pins to the first external connection pads and an approach direction of the probe pins to the second external connection pads are made different from each other.
Abstract: In some aspects, the present invention provides a method for estimating at least one measurement/object property of a metal object. The method includes generating a time-varying eddy current in a wall of the metal object utilizing a pulsed-signal transmitter. The method further includes measuring the time-varying eddy current, fitting the time-varying measured eddy current to a parameterized polynomial, and interpreting the parameterized polynomial to determine one or more measurement/object properties of the metal object.
Type:
Grant
Filed:
September 30, 2003
Date of Patent:
February 28, 2006
Assignee:
General Electric Company
Inventors:
Andrew May, Changting Wang, Yuri Alexeyevich Plotnikov
Abstract: A method (10) permits determining the temperature in a magnetic resonance check weighing system (24) of a sample in a container (22) on a production line at the time of magnetic resonance testing. Method (10) includes the steps of determining a time-temperature correction factor for the sample in the container (50), measuring the temperature of the composite sample and the container at a time other than the time of magnetic resonance testing (70), and applying the correction factor to the temperature of the composite sample and container at a time other than the time of magnetic resonance testing (80).
Type:
Grant
Filed:
June 30, 2004
Date of Patent:
February 21, 2006
Assignee:
The BOC Group, Inc.
Inventors:
Alexander Schaepman, Vincent Bons, Paulus C. J. M. Hendrickx, Jozef A. W. M. Corver
Abstract: The present invention includes a method for testing a chip, comprising the steps of measuring power drawn by the chip, calculating a test frequency using the measured power drawn by the chip, and determining performance of the chip at the calculated test frequency. The present invention also includes a system for testing a chip including a first sensor to measure power drawn by the chip, a controller to calculate a test frequency using the measured power drawn by the chip, and a second sensor to measure speed of the chip at the calculated test frequency.
Type:
Grant
Filed:
December 4, 2002
Date of Patent:
January 24, 2006
Assignee:
Hewlett-Packard Development Company, L.P.
Abstract: The invention includes digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges. Embodiments of skewed logic devices in accordance with the present invention include inverters, buffers, NOR gates and NAND gates for rapidly propagating a selected “fast” edge of an input signal. Additional embodiments include pulse stretchers, memory devices, substrates, computer systems and methods incorporating the skewed logic devices of the present invention. Each embodiment of a skewed logic device of the present invention is configured to propagate either a fast rising edge or fast falling edge of an output signal, i.e., the “fast” edge, at rates comparable to those of domino logic. An advantage of the skewed logic devices of the present invention over conventional CMOS logic devices is rapid edge propagation. Additionally, virtually all of the input gate loading is devoted to the fast edge being propagated.
Type:
Grant
Filed:
January 3, 2003
Date of Patent:
January 3, 2006
Assignee:
Micron Technology, Inc.
Inventors:
John D. Porter, Dean D. Gans, Larren G. Weber
Abstract: A method and associated decoder, system, device and storage means for decoding codewords of variable length from a bit stream, in which minimum and maximum lengths are defined for the codewords, wherein the bit stream is processed in parts, each part being subjected to a search for codewords, and where found codewords are decoded. At least partly overlapping fields are extracted from the bit stream part in such a way that the starting point of at least two fields is a possible starting point of a codeword in that part. In at least one field, the end of the codeword is searched, and the data related to the codeword is determined on the basis of the end point of the codeword. Data relating to at least one codeword is used to determine the occurrence of the codeword intended to be decoded in a field, and the found codeword is decoded.
Type:
Grant
Filed:
June 18, 2003
Date of Patent:
December 27, 2005
Assignee:
Nokia Corporation
Inventors:
Stamatis Vassiliadis, Jari Nikara, Jarmo Takala, Petri Liuha
Abstract: A non-uniform resistor is used with a flash A to D converter in order to provide an A to D output which is not linear. The nonlinearity of the A to D output is specially designed to carry out a predetermined correction of the signal.
Type:
Grant
Filed:
November 9, 2000
Date of Patent:
December 20, 2005
Assignee:
Micron Technology, Inc.
Inventors:
Sandor Barna, Daniel Van Blerkom, Eric R. Fossum
Abstract: The invention includes digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges. Embodiments of skewed logic devices in accordance with the present invention include inverters, buffers, NOR gates and NAND gates for rapidly propagating a selected “fast” edge of an input signal. Additional embodiments include pulse stretchers, memory devices, substrates, computer systems and methods incorporating the skewed logic devices of the present invention. Each embodiment of a skewed logic device of the present invention is configured to propagate either a fast rising edge or fast falling edge of an output signal, i.e., the “fast” edge, at rates comparable to those of domino logic. An advantage of the skewed logic devices of the present invention over conventional CMOS logic devices is rapid edge propagation. Additionally, virtually all of the input gate loading is devoted to the fast edge being propagated.
Type:
Grant
Filed:
January 3, 2003
Date of Patent:
December 6, 2005
Assignee:
Micron Technology, Inc.
Inventors:
John D. Porter, Dean D. Gans, Larren G. Weber
Abstract: A zero stripper (10) accepts individual bit sequences marked off by a break codes in a bit stream, deletes any leading “0” bits from such bit sequences so as to form a zero-stripped datum segment, counts the number of bits in each resultant datum segment, and then concatenates each such datum segment with the bit count of that datum segment into the code form nnnndddddd . . . , where the “n's” are the bit count and the “d's”are the successive bits. Substantial bit space in transmission in thus saved. A “type code” “tt” can also be added if defined in the original data. The zero-stripped data can be reconstituted at the receiving end if needed, i.e., if the receiving device accepts only fixed length bytes. Also included are new and simple arithmetic routines.
Abstract: A structure for magnetically shielded transmission lines for use with high speed integrated circuits having an improved signal to noise ratio, and a method for forming the same are disclosed. At least one magnetic shield structure formed by atomic layer deposition (ALD) contains electrically induced magnetic fields generated around a number of transmission lines. The shield material is made of alternating layers of magnetic material and insulating material.
Type:
Grant
Filed:
May 22, 2003
Date of Patent:
November 29, 2005
Assignee:
Micron Technology, Inc.
Inventors:
Salman Akram, Kie Y. Ahn, Leonard Forbes
Abstract: A filter assembly includes a transmission filter, a reception filter, a change-over switch, and phase circuits. The transmission filter has first and second ends electrically connected to a first antenna terminal and a transmission terminal, respectively. The reception filter has a first end electrically connected to a second antenna terminal via the change-over switch, and a second end electrically connected to a reception terminal. A main antenna is connected to the first antenna terminal, and a diversity antenna is connected to the second antenna terminal. The change-over switch performs switching control to connect the reception filter to one of the first and second antenna terminals. Thus, the filters utilize a fixed number of resonators regardless of switching control of the change-over switch, thereby achieving optimum filter characteristics.
Abstract: An algorithmic or cyclic data converter uses an RSD stage having a switched capacitor network for efficiently scaling at least one externally supplied reference voltage. A reference voltage is scaled by using capacitor ratios that also function to provide an output voltage used as a residue output of the RSD A/D converter. The residue is used to generate a bit value corresponding to the magnitude of the residue. Two RSD stages cycle back and forth generating a logic value each half clock cycle until the desired bit resolution is achieved. In one form, the RSD stage scales the externally supplied reference voltage only by factors of less than one. In another form, the RSD stage scales the reference voltage by any scaling factor. A reference voltage scaling circuit separate from the RSD stage is avoided.
Type:
Grant
Filed:
March 19, 2004
Date of Patent:
November 22, 2005
Assignee:
Freescale Semiconductor, Inc.
Inventors:
Ahmad H. Atriss, Steven P. Allen, Douglas A. Garrity
Abstract: Different video codecs can be integrated or duplicated functions of each codec can be shared. According to an apparatus and method for supporting plural codecs of the present invention, a decoding process can be performed by analyzing information of a transmitted bit stream, deciding kind of codec being used by means of a header analysis unit, connecting through a switching unit to a corresponding decoder of a decoding unit including plural decoders or to a corresponding operation block among a plurality of operation blocks including at least one function.