Patents Examined by Minh Loan Tran T.
  • Patent number: 4989050
    Abstract: A light emitting diode is provided comprising a substrate which is transparent to the emitted light upon which a plurality of semiconductor layers, including a quantum well active layer, are formed. The materials are chosen not only for their optical characteristics but also so that many of the layers act as etch stops for layers which are formed on top of them. In addition to operational semiconductor layes which form the light emitting diode, two sacrificial semiconductor layers are formed on the substrate which serve as masks during processing and are removed prior to device metallization. An initial pattern is formed in the uppermost semiconductor layer and is transferred down through lower layers using the etch stop layers and selective etches so that further photolithography steps are unnecessary. Electrodes are formed on one side of the device by conventional metal deposition techniques and are self aligned to the LED junction.
    Type: Grant
    Filed: August 28, 1989
    Date of Patent: January 29, 1991
    Assignee: Motorola, Inc.
    Inventors: Craig A. Gaw, Curtis D. Moyer
  • Patent number: 4987459
    Abstract: A variable-capacitance diode element having a wide capacitance variation range is disclosed which comprises an epitaxial layer of a first conductivity type which is provided on a semiconductor substrate of the first conductivity type; a diffusion layer of the first conductivity type which is formed in the epitaxial layer with a higher concentration than said epitaxial layer by means of ion implantation; at least one diffusion layer of a second conductivity type which is formed in the diffusion layer of the first conductivity type so as to define PN junction; and a first-conductivity type buried layer of a low resistivity which is formed the boundary portion between the semiconductor substrate and the epitaxial layer where a depletion layer reaches which occurs in response to a reverse bias voltage being applied to the PN junction, whereby the depletion layer is caused to extend to a maximum possible effect.
    Type: Grant
    Filed: January 17, 1990
    Date of Patent: January 22, 1991
    Assignee: Toko, Inc.
    Inventor: Takeshi Kasahara