Abstract: Software controllers are generated and applied by identifying a controllable parameter and a readable metric from a target entity, generating a software controller configured to determine a value of the controllable parameter based on the readable metric, receiving a first metric value corresponding to the readable metric, and applying a first controllable parameter value to the target entity, the first controllable parameter value produced by the software controller in response to input of the first metric value. Software controllers are generated by arranging a sequence of operations relating the controllable parameter to the readable metric, applying a plurality of genetic operators to the sequence to produce a plurality of offspring sequences, and determining whether each offspring sequence among the plurality of offspring sequences is fit for use as the software controller.

Abstract: Methods and apparatus for supplying power to a dynamic load, such as a neural network circuit. One example power supply circuit generally includes a voltage regulator circuit and a distribution circuit coupled to one or more outputs of the voltage regulator circuit. The distribution circuit is configured to output different amounts of current based on changes in the dynamic load. For certain aspects, the dynamic load includes a neural network circuit having a plurality of segments. In this case, the distribution circuit may be configured to output the different amounts of current based on which segment in the plurality of segments of the neural network circuit is active.

Abstract: Systems and methods for firmware-based switching between user profiles in a heterogenous computing platform. In an illustrative, non-limiting embodiment, an Information Handling System may include: a heterogeneous computing platform comprising a plurality of devices, and a memory coupled to the platform having a plurality of sets of firmware instructions, where each of the sets of firmware instructions, upon execution by a respective device, enables the respective device to provide a firmware service, and at least one of the devices operates as an orchestrator configured to: execute or instruct a device to execute an Artificial Intelligence model configured to produce an inference result based, at least in part, upon context or telemetry data received from a subset of the plurality of devices; select one of a plurality of user profiles based upon the inference result; and apply a setting associated with the selected user profile to a selected device.

Abstract: An information processing terminal includes a processor, a memory, a communication unit, a container reception module, a container execution module and a sensor. The container reception module receives a container image via the communication unit. The container execution module boots the container when the container image is received and executes the application contained in the container image. The container boots the application based on the recognition situation about the sensor is recognized. The application executes a predetermined processing for sensing data acquired from the sensor.

Abstract: Disclosed herein are network elements for use in a transport network and methods of using the same. The network elements may comprise an embedded device having a processor, a communication device in communication with the processor, a first memory, a second memory, and a third memory. The third memory may store a hybrid boot sequence comprising computer-executable instructions that when executed by the processor of the embedded device cause the embedded device to: determine whether a first kernel image is stored on the first memory; responsive to the determination that the first kernel image is not stored on the first memory, obtain a second kernel image stored on a remote network element; store at least one of the first kernel image and the second kernel image on the second memory as a primary kernel image; and boot the primary kernel image stored on the second memory.

Abstract: Methods, systems, and devices for grouping power supplies for a power saving mode are described to configure a memory device with groups of internal power supplies whose voltage levels may be successively modified according to a group order signaled by an on-die timer. For example, when the memory device enters a deep sleep mode, respective voltage levels of a first group of internal power supplies may be modified to respective external power supply voltage levels at a first time, respective voltage levels of a second group of internal power supplies may be modified to respective external power supply voltage levels at a second time, and so on. When the memory device exits the deep sleep mode, the groups of internal voltage supplies may be modified from the respective external power supply voltage levels to respective operational voltage levels in a group order that is opposite to the entry group order.

Abstract: An in-vehicle control device includes a processor configured to: control a device of a first type, which has a function of switching an operation mode between a normal mode and a mode in which power consumption is limited compared to the normal mode in accordance with an instruction via communication and a device of a second type, which does not have the function; specify a limited device that is a device of which power consumption is to be limited, based on information acquired from outside; transmit to the limited device via a communication line an instruction to shift the operation mode to the mode in which power consumption is limited compared to the normal mode, when the limited device is the device of the first type; and stop power supply to the limited device when the limited device is the device of the second type.

Abstract: A method for providing a function by a group of computing units in which computation instances are executed, each computation instance implementing the function using at least one algorithm and being set up to determine at least one result in response to a call of the function. The method includes: determining an integrity level for each of the computation instances; receiving a function request from a subscriber, the function request including a quality requirement that includes an integrity requirement; selecting a plurality of the computation instances corresponding to the quality requirement, so that the integrity level of the selected computation instances corresponds to the integrity requirement; calling the function in the selected computation instances corresponding to the function request in order to determine a plurality of results; determining a response based on the results, taking into account the quality requirement; and sending the response to the subscriber.

Abstract: The disclosed computer-implemented method may include (1) transferring control of a display of a computing device from a high-power physical processor of the computing device to a low-power physical processor of the computing device, (2) animating, using the low-power physical processor, the display at a first frame rate during a first time period, (3) animating, using the low-power physical processor, the display at a second frame rate during a second time period, (4) transferring control of the display from the low-power physical processor to the high-power physical processor, and (5) animating, using the high-power physical processor, the display. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Systems and methods for enabling Out-of-Band (OOB) management of heterogeneous computing platforms in low-power states. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform and an Embedded Controller (EC) integrated into or coupled to the heterogeneous computing platform, where the EC is configured to: wake up from a low-power state while a host processor of the heterogeneous computing platform remains in the low-power state, and wake up a network device configured to access a cloud service through an OOB channel to check a status of an OOB command buffer while the host processor remains in the low-power state.

Abstract: Embodiments pertain to reducing power consumption in a computing system comprising one or more deterministic processors. A controller generates a plurality of control signals for a voltage regulator to regulate a supply voltage of a respective one of the one or more deterministic processors. A power management module determines an initial profile for power consumption and performance of an algorithm executed on the respective deterministic processor having an initial value for the supply voltage and an initial value for a clock frequency. The power management module further determines a target profile for power consumption and performance of the algorithm executed on the respective deterministic processor. The controller modifies the plurality of control signals based on the initial profile and the target profile. The respective deterministic processor executes the algorithm while the supply voltage is dynamically modified by the voltage regulator based on the modified plurality of control signals.

Abstract: A processor, a signal adjustment method, and a computer system including the processor are provided, pertaining to the field of computer technologies. The processor includes a memory controller. The memory controller includes a memory physical interface and a first processor core, and the first processor core is connected to the memory physical interface. After the computer system is started and during a running process of the computer system, the first processor core is configured to adjust a timing relationship between a target signal of the memory physical interface and a synchronization signal of the target signal. According to this application, timing alignment can be ensured between the target signal and the synchronization signal, thereby improving correctness of sampling performed on the target signal.

Abstract: A system for providing power from a USB-C PD connection includes a USB-C power delivery (PD) port. The USB-C PD port is configured to provide a number of output voltages. A power cable is configured to be electrically connected with the USB-C PD port. The power cable is configured to transmit at least one voltage of the numerous output voltages to a peripheral device. A housing is coupled with the cable. The housing includes a USB-C connector configured to be removably coupled with the USB-C PD port to electrically connect the power cable with the USB-C PD port. A control circuit assembly is electrically connected with the housing. The control circuit assembly is configured to negotiate an output voltage of the numerous available output voltages between the peripheral device and the USB-C PD port.

Abstract: A system for providing power from a USB-C PD connection includes a USB-C power delivery (PD) port. The USB-C PD port is configured to provide a number of output voltages. A power cable is configured to be electrically connected with the USB-C PD port. The power cable is configured to transmit data and at least one output voltage of the numerous output voltages to a peripheral device. A housing is coupled with the cable. The housing includes a USB-C connector configured to be removably coupled with the USB-C PD port to electrically connect the power cable with the USB-C PD port. A control circuit assembly is electrically connected with the housing. The control circuit assembly is configured to negotiate an output voltage of the numerous available output voltages between the peripheral device and the USB-C PD port.

Abstract: A method for allowing a firmware update when a digital certificate for a firmware update image is expired includes initiating a firmware update of a computing device and determining, using a secure boot process, that a firmware update image has an expired digital certificate. The firmware update image is stored in nonvolatile memory accessible to a service processor and to a host processor of the computing device. The method includes determining that the firmware update image and an image of firmware with code of the secure boot process were digitally signed by a same entity and overriding the secure boot process to allow execution of the firmware update image in response to determining that the firmware update image and the image of the firmware with code of the secure boot process were digitally signed by a same entity.

Abstract: This application discloses a clock synchronization system, including a quantum control processor (QCP) and N digital/analog mutual conversion devices, each digital/analog mutual conversion device including a frequency conversion module and a signal synchronization module that includes a D flip-flop (DFF). The QCP generates a global synchronization signal and reference clock signals; and transmits the global synchronization signal and a reference clock signal to the frequency conversion module and transmits the global synchronization signal to the signal synchronization module of each conversion device. The frequency conversion module performs frequency conversion processing on the reference clock signal to obtain a target clock signal, and generates a signal synchronization instruction according to the global synchronization signal; and transmits the signal synchronization instruction and the target clock signal to the signal synchronization module.

Abstract: Systems and methods for secure booting of secure programmable logic devices (PLDs) are disclosed. An example system includes a secure PLD including programmable logic blocks (PLBs) arranged in a PLD fabric of the secure PLD, and a configuration engine configured to program the PLD fabric according to a configuration image stored in a non-volatile memory (NVM) of the secure PLD and/or coupled through a configuration input/output (I/O) of the secure PLD to the configuration engine. The secure PLD is configured to retrieve a pre-authentication status associated with the configuration image from the NVM, determine or verify the retrieved pre-authentication status associated with the configuration image includes a valid status, and boot the PLD fabric of the secure PLD using the configuration image.

Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

Abstract: Methods and systems for selecting, testing, and applying application configurations are presented. In one embodiment, a method is provided that includes executing an application according to a first configuration and measuring a first plurality of metrics. One or more changes to a plurality of configuration settings of the first configuration may be identified by a machine learning model to generate one or more new configurations. Among the one or more new configurations, a second configuration for future executions of the application may be selected based on the first plurality of metrics and a second plurality of metrics associated with an execution of the application.

Abstract: The present invention relates to a method for determining a configuration operable by a configurable electronic device. The device receives a second configuration and a predefined parameter. The device archives a first configuration in the non-transitory computer readable storage medium. The device applies the second configuration and then determine whether the predefined parameter is satisfied. When the predefined parameters are satisfied, the device maintains to apply the second configuration. When the predefined parameter is not satisfied, the device retrieves the first configuration and applies the first configuration.