Abstract: A flip chip bonded package applicable to a fine pitch technology uses, inter alia, insulative posts instead of using conductive bumps, which correspond to electrodes one by one. The insulative posts are assigned to every two bonding pads for the sake of flip chip bonding. This makes it possible to fabricate flip chip bonded packages very easily without modifying conventional processes. Larger bumps are provided even in the case of a technology having the same pad size and pitch during flip chip bonding. This makes the subsequent attachment process easy and reduces the defective ratio. The insulative posts, when made of a polymer, also act as stress buffers. This improves the reliability of the package.
Abstract: A method of making a ferroelectric thin film includes the step of forming a ferroelectric thin film with a randomly oriented layered structure on a surface of a conductor layer. At least the surface of the conductor layer has a spherical crystal structure.
Type:
Grant
Filed:
August 16, 2000
Date of Patent:
May 22, 2007
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A method for manufacturing a semiconductor substrate of a first concentration type is described, which comprises at least a buried insulating cavity, comprising the following steps: forming on the semiconductor substrate a plurality of trenches, forming a surface layer on the semiconductor substrate in order to close superficially the plurality of trenches forming in the meantime at least a buried cavity in correspondence with the surface-distal end of the trenches.
Type:
Grant
Filed:
December 1, 2003
Date of Patent:
March 20, 2007
Assignee:
STMicroelectronics S.r.l.
Inventors:
Crocifisso Marco Antonio Renna, Luigi La Magna, Simona Lorenti, Salvatore Coffa
Abstract: This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths of 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is used to fabricate the interconnection circuits. A polymer base layer is formed on a glass carrier with an intermediate release layer. Alternate layers of metal and dielectric are formed on the base layer, and patterned to create an array of multi-layer interconnection circuits on the glass panel. A thick layer of polymer is deposited on the interconnection circuit, and openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings to form wells filled with solder.