Abstract: A computer system which includes a DMA controller on the local I/O unit which can be programmed by either the host processor or the local processor. Semaphore flags and lock bits are provided to allow determination of control of the local DMA controller and for passing information. Additionally, data alignment and padding circuitry is provided. The circuitry is informed of the logical data arrangement desired or utilized by the host processor or other devices and knows the data arrangement of the local processor. The circuitry properly obtains and realigns the data based on the transfer direction and data arrangement. The circuitry further properly zero pads the data when realignment is such that padding is necessary.

Abstract: An improved audio-output device coupleable to a computer system, in which a DSP operating under software control emulates a common command interface. The command interface has a set of registers that are made available to the CPU for reading and writing, even if there are no such physical registers available in the device. The DSP also performs tasks in addition to audio-output, even though the audio-output device is required to respond immediately to commands from the CPU. The audio-output device has a DSP for interpreting and executing commands received from the CPU, a local memory for storing data input to or output from the DSP, a bus-interface (BIF) element for coupling the DSP and memory to a system bus, and a direct memory access (DMA) element for transferring data between the local memory and the system bus.

Abstract: A system and method of providing an embedded controller network communication protocol, for controlling communications between a central controller and a plurality of active embedded controllers, wherein a first data transmission token (T2) is passed, under control of the central controller, from the central controller to an active embedded controller, back to the central controller, and then sequentially from the central controller to and from each coupled active embedded controller. Any active embedded controller may return data to the central controller only appended to the first token. A second data transmission token (T1) addressed to one active embedded controller is broadcast from the central controller to all of the active embedded controllers, with a data stream to be transmitted from the central controller to the addressed active embedded controller appended to the second data transmission token (T1).

Abstract: A high performance Local Bus Peripheral Interface (LBPI) for a computer local bus and its high performance peripheral interface(s), using a pipelined architecture to increase the use of the available data transfer bandwidth. To accomplish the above, the LBPI, which is coupled between the computer local bus and the peripheral interface(s), is provided a pipelined architecture which includes a Read Ahead Buffer, a Read Ahead Counter, a Data Out Latch, and a Controlling State Machine with a Configuration Register. In one embodiment, the LBPI can be selectably configured to couple on the host side to either a VL bus or PCI bus. Efficiency of Read-Ahead operations is further enhanced by maintaining a countdown of the number of words of a data sector already transferred and/or "snooping" the peripheral device commands from the computer to intelligently predict the occurrence of subsequent read data transfers commands.

Abstract: A channel processor (CHP) within a channel apparatus instructs parallel transfer of data through a plurality of channels within a channel cluster (CCL), when it reads out a LCUW. Each of the channels sequentially generates addresses of a main storage determined based on numbers of respective channels under control of a control section and a channel data controller (CDC) accesses the main storage according to the generated addresses to read out data. Those channels transfer the data in parallel to an auxiliary storage device through an optical fiber cable set. This auxiliary storage device includes a plurality of channel ports, two buffer control circuits, a buffer and a high speed storage unit. The buffer has a two-face structure, each of the faces having 2 kilo-bytes. One of the buffer control circuits receives data from the channel ports through the optical fiber cable set in the plurality of channels and selects either one of the faces of the buffer to write them therein.

Abstract: A unique combination of software and hardware provides any computer with a system for high speed digital data communications using the computer's standard parallel printer port. The disclosed embodiment of the invention allows any computer with a standard parallel printer port to play or record digital audio sound allowing the computer to serve as a platform for multimedia presentations.

Abstract: An apparatus and method for lining public and private pages in a conferencing system is disclosed. In a computer conferencing system having a plurality of participants coupled by a communication medium, a process for linking public and private pages comprises the steps of: 1) collecting public meeting information generated by any of the plurality of participants, the public meeting information including at least one public page of annotations; 2) collecting private meeting information from a local participant in which the meeting manager is resident, the private meeting information being different from the public meeting information, the private meeting information not accessible to the plurality of conference participants other than the local participant, the private meeting information including at least one private page of annotations; and 3) selectively linking the private page with the public page, the private page being implicitly accessed when the linked public page is explicitly accessed.

Abstract: A system and method for testing the functionality of a VGA card and associated monitor. A testing and set up tool or Program is installed in a computer having an operating system. The Program provides a list of modes and timings for a plurality of monitors including the monitor being tested as part of the computer. A user of the Program selects various modes and timings to be tried. Looking at the screen of the monitor enables the user to determine which combinations of modes and timings, for example, are successful. A list is maintained for the modes and timings that prove successful or compatible. The list for compatible combinations is passed to the driver associated with the operating system of the computer. In a DOS environment, for example, the list of compatible combinations is used by the Program to write a Command Line that is used for setting up the associated CONFIG.SYS.

Abstract: In a semiconductor device having an MPU and a plurality of peripheral devices controlled by the MPU through a bus, to facilitate the interconnection of the peripheral devices without the use of the MPU, improve response speed and the processing speed of a main program by eliminating an interrupt processing from the processings of the MPU, facilitate changes in the interconnection of the peripheral devices, and enable a reduction in the number of external terminals, event buses for transmitting event signals are provided between the peripheral devices or between the peripheral devices and the external terminals so that the connection between the peripheral devices and the external terminals can be switched by the multiplexers.

Abstract: The present invention provides an elegant and simple way to provide mechanisms for invocation of objects by client applications and for argument passing between client applications and object implementations, without the client application or the operating system knowing the details of how these mechanisms work. Moreover, these mechanisms functions in a distributed computer environment with similar ease and efficiency, where client applications may be on one computer node and object implementations on another.The invention includes a new type of object, termed a "spring object," which includes a method table, a subcontract mechanism and a data structure which represents the subcontract's local private state.

Abstract: A system of a maximum of N units (A, B, C, D, . . .) distributed in a network (RE) operating by a predetermined protocol (SCSI) by which the length of any bus (SCSI.sub.1, SCSI.sub.2, SCSI.sub.3) assuring the connection of a plurality of units among one another has a given maximum value, characterized in that, since the distance between the units is greater than the maximum value, it includes a plurality of local partial buses (SCSI.sub.1 -SCSI.sub.3) that are connected to one another via bidirectional point-to-point links (LPP.sub.1, LPP.sub.2) and are managed by intermediate transmission devices (DIT.sub.1, DIT.sub.21, DIT.sub.23, DIT.sub.3), each of which is connected both to a partial bus and to a point-to-point link and intervenes in the phases of gaining control of the network on the part of any unit connected to any one of the partial buses.

Abstract: According to the present invention, a function can be added to a peripheral apparatus by making a change in only a few parts of a data processing system without making changes regarding hardware in, especially, a system unit nor an interface part between the system unit and the peripheral apparatus. A predetermined control signal, said signal being a signal for causing a peripheral apparatus such as a floppy disk drive to perform a first predetermined operation, is provided to said peripheral apparatus in a predetermined condition in order to cause said peripheral apparatus to perform a second predetermined operation which is different from said first predetermined condition.

Abstract: A method of separating jumpless add-on cards having identical I/O ports onto different I/O ports by first providing a special comparator in the hardware and then providing a software program to produce different responses from different add-on cards even though such cards are using the same I/O ports.

Abstract: A distributed memory I/O interface 10 is provided which allows a plurality of standard peripheral bus I/O controllers 101 to perform multiple transfer operations simultaneously and independently within a networked, distributed memory system 102. The interface 10 includes a peripheral interface 11 to the I/O controllers 101, a memory interface 12 to the distributed memory system 102, a system interface 13 to the processors of the distributed memory system 102, a caching circular buffer RAM 12, and an internal bus 105. The operations of the interface 10 are controlled by logical channels. Each logical channel comprises a channel context, which includes a set of parameters stored in buffer RAM 12 that specify among other things logical address space, a physical memory map, a RAM buffer segment, and a set of allowed transactions for use during channel operations.

Abstract: In a format such that a plurality of input/output devices are allocated to a plurality of virtual machines in a one-to-one corresponding manner, a group ID issued from each of the virtual machines is held into a table every plurality of access paths which reach a plurality of input/output devices via a plurality of channel devices and an input/output control unit. When an input/output command issued from the virtual machine is received, the access paths belonging to the same group are detected from among a plurality of access paths which reach the input/output device which executes a command with reference to the table and the input/output operations are executed. Even in a format such that one disk unit is commonly used by a plurality of virtual machines, since the disk control unit can recognize the plurality of virtual machines, an exclusive control is executed without needing the use of a monitor section.

Abstract: Data communication method and system for transmitting a large amount of data via a network such as LAN to which a plurality of stations or terminals are connected, through a simplified processing procedure with high reliability and high efficiency while suppressing influence to other communications. The large amount of data is transmitted from a sender station to a plurality of receiver stations by utilizing a connectionless communication service, while inter-station reception acknowledging/retransmitting processings are performed by using a connection-oriented communication service. The large amount of data to be transmitted is divided into a plurality of blocks, and inter-block delay time is set on the basis of station status factors such as a permissible load increase rate of the CPU of the individual stations.

Abstract: The present invention provides an elegant and simple way to provide mechanisms for invocation of objects by client applications and for argument passing between client applications and object implementations, without the client application or the operating system knowing the details of how these mechanisms work. Moreover, these mechanisms functions in a distributed computer environment with similar ease and efficiency, where client applications may be on one computer node and object implementations on another. The invention includes a new type of object, termed a "spring object," which includes a method table, a subcontract mechanism and a data structure which represents the subcontract's local private state. This application is directed to a Shared Memory subcontract whereby a client and a server can share a memory region for argument and results passing in certain circumstances without the intervention of the kernel and with no restrictions on the type or complexity of the arguments being exchanged.

Abstract: A method and system for the efficient distribution of electronic mail items within a distributed data processing system having multiple users enrolled therein wherein each user utilizes a computer or terminal device having a unique address. After selecting an individual electronic mail item for distribution an intuitive graphic representation of a group of unique addresses is displayed within a user's terminal device. The intuitive graphic representation may take one of several forms including a two or three dimensional graphic representation of an office floor plan which identifies the occupants of each office, or a photographic image of one or more users. In response to a graphic selection by the user of a particular graphic representation, or portion thereof, an identified electronic mail item is then automatically distributed to the user whose unique address is associated with that graphic representation or portion thereof.

Abstract: A secure front-end communication system which couples a plurality of actively redundant process control computers to a computer network. The system includes a front end computer which is capable of establishing time limited communication contracts with one or more computer entity on the computer network. Each time limited communication contract is based upon an acceptable response to the transmission of an unpredicable signal from the front end computer, such as an encrypted transformation of a psuedo-random number generated by the front end computer. A security table is used to identify the network entities that are permitted to send write command messages to the process control computers to which the front end computer is connected. The front end computer also includes at least one permissive table which is used to determined whether a write command message from the network entity should be transmitted to the process control computer for which the message was intended.

Abstract: Administration order program modules (APM) are transferred into a job file memory (AS) of a network management central (NMZ) that can be connected to the communication systems (AS) via a local network (LAN). The job information and communication system information (asi, ksi) as well as a type of job information (ati) contained in an allocated updating message (ai) are entered into a job library file (ABR) provided in the network management central (NMZ), i.e. are logged. The transferring or logging into the job library file (ABR) is indicated to a job management routine (AVR). The respective administration order program module (APM) is communicated to the appertaining communication systems (KS) the job management routine (AVR) and is processed in these communication systems (KS).