Abstract: After a level of a selection signal C is changed, a currently output clock signal present at an output line is interrupted (set to be a low level) at the fall of the level of the currently output clock signal (A or B), and a switching operation is started. After the switching, the supply of an extracted clock signal to the output line is resumed when the level of the extracted clock signal (A or B) is changed. The best clock signal, which is synchronized with a plurality of source clock signals, can be provided to another system such as an IC card without increasing the number of parts. No noise is generated at a clock signal switching time, and the time required for switching can be kept to a minimum.