Abstract: A specification is given of a circuit arrangement for controlling a pulse output stage, which comprises a MOS-FET power stage and a controller stage. The controller circuit (5) is connected to the drain of the MOS-FET (1) as the sole voltage supply, and the parameters of the circuit arrangement are designed such that the voltage drop across the drain of the MOS-FET (1) does not exceed the permissible voltage maximum at the gate of the MOSFET (1). The supply current flowing from the drain of the MOS-FET to the controller circuit preferably contributes to the load current.