Patents Examined by N. Tran
  • Methods for reducing the effects of power supply distribution related noise
    Patent number: 6266288
    Abstract: A method is provided for reducing the effects of power supply distribution related noise in an integrated circuit, the integrated circuit having a power supply bus, a ground bus, a DRAM-technology capacitor, and a load circuit The method includes forming the DRAM-technology capacitor adjacent the load circuit, and connecting the DRAM-technology capacitor directly between the supply voltage bus and the ground voltage bus.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: July 24, 2001
    Assignee: Intel Corporation
    Inventor: Shekhar Yeshwant Borkar