Abstract: A display device may include a substrate, a first active layer disposed on the substrate and including a first source region, a first drain region, and a first channel region disposed between the first source region and the first drain region, a first gate insulating layer covering the first active layer on the substrate, first gate electrodes disposed in opposite sides of the first channel region on the first gate insulating layer, a second gate insulating layer covering the first gate electrodes on the first gate insulating layer, a second gate electrode disposed in a central portion of the first channel region on the second gate insulating layer, and a first connection electrode disposed on the second gate electrode and connected to the first and second gate electrodes.

Abstract: Due to its geometry, spherical reflector antenna is inherently diffractive, leading to spherical aberration. Disclosed are example embodiments of methods and systems to minimize or eliminate spherical aberration in a spherical reflector antenna system. One of the systems includes: a main spherical reflecting dish; and a spherical feed having a plurality of antenna elements disposed on a spherical surface. The plurality of antenna elements can be disposed on a convex surface of the spherical surface of the spherical feed facing the main spherical reflecting dish.

Abstract: A structure is provided that includes a first conductive component and a first interlayer dielectric (ILD) that surrounds the first conductive component. A self-assembly layer is formed on the first conductive component but not on the first ILD. A first dielectric layer is formed over the first ILD but not over the first conductive component. A second ILD is formed over the first conductive component and over the first ILD. An opening is etched in the second ILD. The opening is at least partially aligned with the first conductive component. The first dielectric layer protects portions of the first ILD located therebelow from being etched. The opening is filled with a conductive material to form a second conductive component in the opening.

Abstract: A display device includes a metal layer disposed on a substrate; a transistor disposed on the metal layer; and a light emitting element electrically connected to the transistor, wherein the transistor includes a semiconductor layer at least partially overlapping the metal layer, the semiconductor layer includes a first region, a second region, and a channel region disposed between the first region and the second region, and the metal layer overlaps the second region and the channel region and is spaced apart from the first region in a plan view.

Abstract: Embodiments described herein include systems and techniques for converting (i.e., transducing) a quantum-level (e.g., single photon) signal between the three wave forms (i.e., optical, acoustic, and microwave). A suspended crystalline structure is used at the nanometer scale to accomplish the desired behavior of the system as described in detail herein. Transducers that use a common acoustic intermediary transform optical signals to acoustic signals and vice versa as well as microwave signals to acoustic signals and vice versa. Other embodiments described herein include systems and techniques for storing a qubit in phonon memory having an extended coherence time. A suspended crystalline structure with specific geometric design is used at the nanometer scale to accomplish the desired behavior of the system.

Abstract: An antenna module includes a dielectric substrate and a radiation element disposed on the dielectric substrate. The dielectric substrate includes a flat portion (131) and a flat portion (130) having mutually different normal directions, and a bent portion connecting the flat portion (131) and the flat portion (130) to each other. The flat portion (131) has a protruding portion partially protruding in a direction toward the flat portion (130) along the flat portion (131) from a boundary portion between the bent portion and the flat portion (131). The flat portion (131) and the bent portion are connected to each other at a position where the protruding portion is not provided in the flat portion (131). At least a part of the radiation element is disposed on the protruding portion.

Abstract: A wireless communication system with scalable diversity and multi-transceiver diversity deployment is disclosed. An example communication system includes a first wireless transceiver, having a first bandwidth and a first center frequency, a second transceiver, having a second bandwidth and a second center frequency, and a processor. The processor is configured to operate the wireless communication system in a first mode when a difference between the first center frequency and the second center frequency is greater than or equal to half of the first bandwidth plus the second bandwidth. The processor is also configured to operate the wireless communication system in a second mode when a difference between the first center frequency and the second center frequency is less than half of the first bandwidth plus the second bandwidth.

Abstract: Aspects of the subject disclosure may include, for example, a device that has a processing system including a processor; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations, including receiving a request for an observation of an overhead viewing area from an observer location; discovering an interference of a satellite with the observation of the overhead viewing area; determining possible solutions to the interference; selecting a solution of the possible solutions; receiving the observation from one or more satellites responding to the solution selected; and providing a response to the request including the observation received. Other embodiments are disclosed.

Abstract: An integrated circuit device comprising a base structure, a gate stack on the base structure and comprising a plurality of gate electrodes spaced apart from each other, a first upper insulating layer on the gate stack, a plurality of channel structures that penetrate the gate stack, each of the plurality of channel structures comprises a respective alignment key protruding from the gate stack, a second upper insulating layer that overlaps the respective alignment key of each of the plurality of channel structures, a top supporting layer on the second upper insulating layer, a bit line on the top supporting layer, and a plurality of bit line contacts that electrically connect respective ones of the plurality of channel structures to the bit line. A sidewall of the first upper insulating layer includes a first step.

Abstract: Disclosed herein are a system, method, and non-transitory computer readable medium for operating an energy plant. In one aspect, a system determines a ratio of flow rates between devices of the energy plant connected in parallel with each other in a branch. The system generates a candidate set of operating parameters of the devices according to the ratio of flow rates. The system predicts thermodynamic states of the devices operating according to the candidate set of operating parameters. The system determines whether the predicted thermodynamic states satisfy constraints of the devices. The system determines whether the predicted thermodynamic states satisfy a target thermal energy load of the branch based on the ratio of the flow rates. The system operates the energy plant according to the candidate set of operating parameters, in response to determining that the predicted thermodynamic states satisfy the constraints and the target thermal energy load.

Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

Abstract: An electronic device for identifying a status of a wireless communication device of various embodiments of the present disclosure can include an antenna configured to receive wireless signals outputted from a first antenna and a second antenna included in an external electronic device, a communication circuit electrically connected to the antenna, and a control circuit. The control circuit can be configured to control the external electronic device wherein the external electronic device outputs specified wireless signals at a first specified phase by using the first antenna and at a second specified phase by using the second antenna, receive the specified wireless signals by using the antenna, identify a signal intensity corresponding to the specified wireless signals by using the communication circuit, and determine a status related to the external electronic device at least on the basis of a difference value between the specified signal intensity and a reference signal intensity.

Abstract: A display device includes a substrate; a semiconductor layer; a gate insulating film; a gate electrode; a first interlayer insulating film; a capacitance electrode; and a second interlayer insulating film. Each of a pixel circuits includes a drive transistor, a capacitor and a connection wiring line. The capacitance electrode is provided with a first opening and a second opening in portions of positions overlapping with the gate electrode in plan view. The first interlayer insulating film and the second interlayer insulating film include a contact hole provided at a position surrounded by the first opening and a hole provided at a position surrounded by the second opening. The connection wiring line is provided on the second interlayer insulating film and is connected to the gate electrode via the contact hole. The hole overlaps with a portion of a channel region in plan view.

Abstract: A crystalline silicon semiconductor layer includes a first channel region and a second conductor region. An oxide semiconductor layer includes a second channel region and a second conductor region. An lower metal layer includes a lower wire. The lower wire is in contact with a first conductor region in a first contact hole. The first conductor region and the second conductor region are electrically connected together through the lower wire.

Abstract: A circuit portion for a radio transceiver comprises: a power amplifier for use when the transceiver operates in a transmission mode, a low-noise amplifier for use when the transceiver operates in a reception mode, a voltage control circuit portion, and a transformer. The transformer comprises a primary winding with a terminal for connecting to an antenna, and a secondary winding comprising a first terminal, a second terminal and a third terminal located between the first and second terminals. The power amplifier is connected to the secondary winding, the low-noise amplifier is connected to both the primary and secondary windings and the voltage control circuit portion is connected to the third terminal of the secondary winding. The voltage control circuit portion applies a first voltage to the third terminal when the transceiver operates in the transmission mode and applies a second, different voltage when the transceiver operates in the reception mode.

Abstract: A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

Abstract: A transformer-based amplifier, an operating method thereof, and devices including the same are disclosed. A millimeter wave amplifier includes a first transformer positioned on an input side of the millimeter wave amplifier, a second transformer positioned on an output side of the millimeter wave amplifier, and one or more of amplification stages positioned between the first transformer and the second transformer.

Abstract: Described are concepts, systems and techniques for detecting whether an antenna is connected to a transmit system to thereby protect a power amplifier lineup from damage.

Abstract: A semiconductor device, the semiconductor device including: a first silicon level including a first single crystal silicon layer and a plurality of first transistors; a first metal layer disposed over the first silicon level; a second metal layer disposed over the first metal layer; a third metal layer disposed over the second metal layer; a second level including a plurality of second transistors, the second level disposed over the third metal layer; a fourth metal layer disposed over the second level; a fifth metal layer disposed over the fourth metal layer, where the fourth metal layer is aligned to the first metal layer with a less than 240 nm alignment error; where the fifth metal layer includes global power delivery; and a via disposed through the second level, where a typical thickness of the second metal layer is greater than a typical thickness of the third metal layer by at least 50%.

Abstract: Provided are a supply modulator and a wireless communication apparatus including the same. A supply modulator according to the inventive concept is driven in any one of an average power tracking mode and a discrete level envelope tracking mode to apply an output voltage to a power amplifier, and includes a multiple output voltage balancer, a switching regulator, a switching regulator controller, a switch array, a discrete-level controller, a switch controller, an output filter, and a main controller.