Patents Examined by Nabil A Adawi, Jr.
  • Patent number: 8589132
    Abstract: A method of analyzing a cause of springback of the invention includes: performing a forming analysis to calculate forming data of a formed product; decomposing a component into an in-plane stress component and a bending moment component; generating a before-calculation individual decomposition forming data; performing a calculation to generate an after-calculation individual decomposition forming data; analyzing a first springback configuration and a second springback configuration; obtaining a degree of influence of a stress in each of the areas with respect to springback deformation; and displaying the degree of influence with respect to the springback deformation.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: November 19, 2013
    Assignee: Nippon Steel & Sumitomo Metal Corporation
    Inventors: Takashi Miyagi, Yasuharu Tanaka, Misao Ogawa
  • Patent number: 8548789
    Abstract: A method for modeling a nuclear reactor core that follows the history of each fuel pin and employs fuel pin flux form factors to explicitly track each fuel pin's fluence and burnup along its axial length and uses this information to obtain fundamental data for each fuel rod, i.e. fuel rod cross-sections, for each fuel pin segment. The data obtained for the fuel pins segments are employed to adjust the fuel pin flux form factors to match the real fuel pins' history so that the fuel rod power distribution can be precisely calculated based on the fuel rod cross-sections and the flux form factors.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: October 1, 2013
    Assignee: Westinghouse Electric Company LLC
    Inventor: Baocheng Zhang
  • Patent number: 8527256
    Abstract: Improved equivalent circuits and circuit analysis using the same for a multilayer capacitor are provided. In one aspect, the equivalent series capacitance C and part of the equivalent series resistance R of a basic equivalent circuit for a multilayer chip capacitor are replaced with a capacitance CO, and capacitances Cm and C1 and the resistance Rc1 to take into consideration abnormal characteristics in electromagnetic distribution that occur at the corners and edges of the internal electrodes in the multilayer chip capacitor. In one aspect, additional circuit elements, such as resistances Rp1 and Rp2, the capacitance Cp, the inductances Lm and L1, and the resistance RL1, are provided to take into consideration the skin effects of the internal electrodes within the multilayer chip capacitor, electromagnetic proximity effects, losses and parasitic capacitance of the dielectric material, as well as parasitic inductance of the external electrodes.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: September 3, 2013
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Xiangying Wu