Abstract: An apparatus may include a circuit configured to generate a set of first ADC samples based on a first signal associated with a first read head position and a failed segment and to generate a set of second ADC samples based on a second signal associated with a second read head position and the failed segment. The circuit may then generate, by a MISO equalizer, a set of equalized ADC samples based on the set of first ADC samples and the set of second ADC samples.
Type:
Grant
Filed:
May 3, 2017
Date of Patent:
March 27, 2018
Assignee:
Seagate Technology LLC
Inventors:
Jason Charles Jury, Marcus Marrow, Michael J Link, Jason Bellorado