Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure including trenches having different depths, forming an insulating layer on the stacked structure to fill the trenches, and forming a plurality of protrusions located corresponding to locations of the trenches by patterning the insulating layer. The method also includes forming insulating patterns filling the trenches, respectively, by planarizing the patterned insulating layer including the plurality of protrusions.

Abstract: There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.

Abstract: The invention disclosed a method to make an implanted hard mask with ultra-small dimensions for fabricating integrated nonvolatile random access memory. Instead of directly depositing hard mask material on top of the memory film stack element, we first make ultra-small VIA holes on a pattern transfer molding (PTM) layer using a reverse memory mask, then fill in the hard mask material into the VIA holes within the PTM material. Ultra-small hard mask pillars are formed after removing the PTM material. To improve the adhesion of the hard mask pillars with the underneath memory stack element, a hard mask sustaining element (HMSE) is added below PTM. Due to a better materials adhesion between HMSE and the hard mask, a stronger hard mask array can be formed.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first metal interconnection on a substrate; forming a stop layer on the first metal interconnection; removing the stop layer to form a first opening; forming an electromigration enhancing layer in the first opening; and forming a second metal interconnection on the electromigration enhancing layer. Preferably, top surfaces of the electromigration enhancing layer and the stop layer are coplanar.

Abstract: A method of forming a tunnel layer of a magnetoresistive random-access memory (MRAM) structure includes forming a first magnesium oxide (MgO) layer by sputtering an MgO target using radio frequency (RF) power, exposing the first MgO layer to oxygen for approximately 5 seconds to approximately 20 seconds at a flow rate of approximately 10 sccm to approximately 15 sccm, and forming a second MgO layer on the first MgO layer by sputtering the MgO target using RF power. The method may be performed after periodic maintenance of a process chamber to increase the tunnel magnetoresistance (TMR) of the tunnel layer.