Abstract: A semiconductor device includes a substrate having a front surface including an active region and a rear surface opposite to the front surface. An active pattern is on the active region. A gate structure extends in a second direction on the active region. Source/drain regions are disposed on the active pattern on both sides of the gate structure. A front interconnection structure is disposed on the gate structure and the source/drain regions. A rear interconnection structure is disposed on the rear surface of the substrate. A target region defined by the source/drain regions and the active pattern includes a non-oxidizing material at a first concentration. The non-oxidizing material is injected during a high-pressure heat treatment process. A rear interconnection region defined by the substrate, the rear through-structure, and the rear interconnection structure includes the non-oxidizing material at a second concentration higher than the first concentration.

Abstract: A semiconductor device includes a plurality of conductive members including a die pad, a first semiconductor element and a second semiconductor element each located on the die pad, an insulating element electrically connected to the first semiconductor element and the second semiconductor element and insulating the first semiconductor element and the second semiconductor element from each other, and an insulating substrate interposed between the die pad and the insulating element and bonded to the die pad. The insulating element is bonded to the insulating substrate.

Abstract: A display apparatus including link wirings and at least one moisture blocking layer is provided. An upper interlayer insulating layer and a device protection layer may be disposed on the link wirings between a display area and a pad area. A power voltage supply line may be disposed between the upper interlayer insulating layer and the device protection layer. An encapsulating dam and an upper planarization layer may be disposed on the device protection layer. The upper planarization layer may be disposed outside a dam area overlapping with the encapsulating dam. The at least one moisture blocking layer may include a first moisture blocking layer between the pad area and the encapsulating dam and/or a second moisture blocking layer between the encapsulating dam and the display area. The first moisture blocking layer and the second moisture blocking layer may overlap an end of the upper planarization layer.

Abstract: The invention relates to the field of superconducting integrated circuits. The invention includes an integrated circuit device comprising a substrate, a Josephson junction on the substrate, external electrodes on the substrate and spaced apart from the Josephson junction, and bridge connections connecting the Josephson junction to the external electrodes. The invention also includes a method for manufacturing such an integrated circuit device.

Abstract: A laser transfer method includes transferring a pad of conductive paste from a conductive-paste layer on a first donor substrate to a receiver substrate by laser-induced forward transfer, and transferring a microelectronic device from a second donor substrate to the pad of conductive paste on the receiver substrate by laser-induced forward transfer. The two steps of laser-induced forward transfer may be performed in the same laser-based machine. The presently disclosed method is applicable to the manufacture of microLED displays. In this context, the disclosed method may yield significant cost reductions, at least by virtue of requiring fewer processing steps and tools than conventional schemes.

Abstract: A substrate comprising a core layer, at least one first dielectric layer coupled to a first surface of the core layer, at least one second dielectric layer coupled to a second surface of the core layer, a plurality of interconnects located at least partially in the at least one first dielectric layer; a region comprising a plurality of block interconnects of an interconnect block; and a solder resist layer coupled to the at least one first dielectric layer.

Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk in a display, a cutting structure may disrupt continuity of the OLED layers. The cutting structure may have two undercuts to disrupt continuity of at least some of the OLED layers. The cutting structure may include a conductive portion that provides a cathode voltage to a cathode layer for the OLED pixels.

Abstract: One or more systems, devices, and/or methods of fabrication provided herein relate to isolated self-aligned super vias. According to one embodiment, a super via device can comprise a super via structure, a metallic line and a dielectric fill material located between the sidewalls of the super via structure and the metallic line.

Abstract: A display device includes a plurality of pixels disposed on a substrate, in which each pixel includes a first subpixel, a second subpixel adjacent to the first subpixel, and a third subpixel adjacent to the second subpixel, the second subpixel disposed between the first subpixel and the third subpixel. A first color filter is disposed in the first subpixel, and is configured to emit light having a first color, a second color filter is disposed in the second subpixel, and is configured to emit light having a second color, and a third color filter is disposed in the third subpixel, and is configured to emit light having a third color. Further, an upper surface of the second color filter is disposed a greater distance from the substrate than an upper surface of the first color filter.

Abstract: A device includes a substrate, a first nanostructure channel above the substrate and a second nanostructure channel between the first nanostructure channel and the substrate. An inner spacer is between the first nanostructure channel and the second nanostructure channel. A gate structure abuts the first nanostructure channel, the second nanostructure channel and the inner spacer. A liner layer is between the inner spacer and the gate structure.

Abstract: A method of manufacturing a display device includes: a liquid-repelling bank formation step of forming a liquid-repellent bank containing a liquid-repelling material that repels a coating liquid; a functional layer formation step of forming a functional layer in a region including an area surrounded by the liquid-repellent bank by applying the coating liquid to the area; and a removal step of, subsequent to the functional layer formation step, removing at least a part of the liquid-repellent bank.

Abstract: The application discloses a display panel and a mobile terminal; the display panel includes a substrate, a light emission layer, a first refractive index layer, and a second refractive index layer, and the first refractive index layer includes multiple openings corresponding to multiple the luminescent pixels, and the second refractive index layer fills in the multiple openings, and the refractive index the second refractive index layer is greater than the refractive index of the first refractive index layer, and orthographic projections of the luminescent pixels cast on the first refractive index layer are located in the openings, and the areas of the openings to which luminescent pixels of different luminescent colors correspond are different.

Abstract: A resin-sealed semiconductor device is configured in such a way that a second bonding material has a melting point higher than that of a first bonding material made of a solder-bonding material, in such a way that one of bonding surfaces through which a power module and a cooling device are bonded to each other with the first bonding material is the other surface portion of a copper plate, and the other one of the bonding surfaces is the surface portion, at the power module side, of the cooling device, and in such a way that the surface portion, at the power module side, of the cooling device is formed of copper or metal having solder wettability the same as or higher than solder wettability of copper.

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers, forming memory openings through the alternating stack, forming memory opening fill structures in the memory openings, forming a first support opening and a second support opening through the alternating stack, laterally expanding the first support opening without expanding the second support opening, forming a first dielectric support pillar structure and a second dielectric support pillar structure in the laterally-expanded first support opening and in the second support opening, respectively, and replacing the sacrificial material layers with electrically conductive layers. Each of the memory opening fill structures includes vertical semiconductor channel and a respective vertical stack of memory elements.

Abstract: A display device includes a display panel, a sensor layer on the display panel, and a light control layer on the sensor layer. The display panel includes a first pixel area emitting a first light and a second pixel area emitting a second light having a light emission wavelength different from a light emission wavelength of the first light, a light emitting element on a base substrate, and an encapsulation layer on the light emitting element. The light control layer includes a high refractive pattern that overlaps the first pixel area, does not overlap the second pixel area, and includes a first colorant, and an overcoat layer covering the high refractive pattern and overlapping the first pixel area and the second pixel area. A refractive index of the high refractive pattern is higher than a refractive index of the overcoat layer.

Abstract: Resistors and method of forming the same are provided. A device structure according to the present disclosure includes a substrate, a first intermetal dielectric (IMD) layer over the substrate, a resistor that includes a first resistor layer over the first IMD layer, a second resistor layer over the first resistor layer, and a third resistor layer over the second resistor layer, a second IMD layer over the first IMD layer and the resistor, a first contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer, and a second contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer.

Abstract: Provided is a display device including a base layer on which a pixel region, a sensor region, and a peripheral region adjacent to the pixel region and the sensor region are defined, an element layer including a light emitting element having a light emitting layer disposed in the pixel region, and including a light sensing element having a photoelectric conversion layer disposed in the sensor region, a light blocking pattern disposed on the element layer and overlapping a portion of the peripheral region, and an optical pattern disposed on the light blocking pattern, wherein at least a portion of the optical pattern overlaps the photoelectric conversion layer on a plane. Accordingly, the display device of an embodiment may sense the biometric information of a user more precisely.

Abstract: A display panel includes a substrate, a first semiconductor layer, an insulating isolation layer, a photosensitive layer, a second semiconductor layer and a light-emitting layer. The first semiconductor layer includes a first electrode in a non-light-emitting area. The insulating isolation layer includes a first opening disposed corresponding to the first electrode. The second semiconductor layer includes a second electrode disposed corresponding to the first opening. A photosensitive portion is provided between the first electrode and the second electrode and connected to both of them.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: A display panel includes a base substrate and a display structure layer disposed on the base substrate, wherein the display structure layer includes a plurality of sub-pixels. At least one sub-pixel includes: a pixel circuit and a light emitting element electrically connected with the pixel circuit. The light emitting element includes a first light emitting unit and a second light emitting unit. A light emitting region of the first light emitting unit and a light emitting region of the second light emitting unit are isolated from each other. The pixel circuit is configured to drive at least one of the first light emitting unit and the second light emitting unit to emit light in the anti-peep display mode.