Abstract: A semiconductor device may comprise a plurality of conductive lines and a plurality of contact plugs. The plurality of conductive lines may include a first conductive line a second conductive line. The plurality of contact plugs may include a first contact plug and a second contact plug. The first contact plug may have a first pillar portion and a first protruding portion protruding from a sidewall of the first pillar portion at a first depth, so as to be in alignment and contact with a sidewall of the first conductive line. The second contact plug may have a second pillar portion and a second protruding portion protruding from a sidewall of the second pillar portion at a second depth, so as to be in alignment and contact with a sidewall of the second conductive line.

Abstract: A semiconductor substrate has a first main surface and a second main surface that oppose each other and a plurality of cells that are arrayed two-dimensionally in a matrix. Each cell includes at least one avalanche photodiode arranged to operate in a Geiger mode. A trench penetrating through the semiconductor substrate is formed in the semiconductor substrate to surround each cell when viewed in a direction orthogonal to the first main surface. A light-shielding member optically separates mutually adjacent cells of the plurality of cells. The light-shielding member includes a first portion extending in a thickness direction of the semiconductor substrate between an opening end of the trench at the first main surface and an opening end of the trench at the second main surface and a second portion projecting out from the second main surface. The insulating film includes a portion that covers the second portion.

Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.

Abstract: A display device may includes: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: A composition containing at least one sensitizer and at least one fluorescent emitter, wherein the sensitizer is a phosphorescent compound and wherein the fluorescent emitter is a sterically shielded compound having a shielding factor (SF) of not less than 0.45. In addition, the invention is to a fluorescent electronic device containing a sensitizer and a fluorescent emitter, wherein the sensitizer is a phosphorescent compound and wherein the fluorescent emitter is a sterically shielded compound.

Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.

Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.

Abstract: An electroluminescent display device comprises first to third subpixels each of which including a contact area and a light emission area, each subpixel provided with a first electrode, the first electrode extending from the light emission area to the contact area of each of the first to third subpixels; a first reflective layer provided in the light emission area of the first subpixel and electrically insulated from the first electrode of the first subpixel; a second reflective layer provided at least in the light emission area of the second subpixel; and a third reflective layer provided at least in the light emission area of the third subpixel.

Abstract: A microelectronic device comprises a stack structure, and slot structures vertically extending through the stack structure and dividing the stack structure into block structures. Each of the slot structures individually comprises an insulative liner material vertically extending through the slot structure and contacting sidewalls of the insulative levels and the conductive levels defining the slot structure, and grains of a material in contact with sidewalls of the insulative liner material. The grains of the material comprise first grains spanning an entire width between the sidewalls of the insulative liner material. Related memory devices, electronic systems, and methods are also described.

Abstract: Redistribution layers of integrated circuits include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

Abstract: A display device includes: a substrate; sub-pixels on the substrate; data lines connected to the sub-pixels; a display driving circuit supplying data voltages to the data lines; and fan-out lines on the substrate and connecting the data lines and the display driving circuit. Each of the sub-pixels includes a first transistor including a first active layer on the substrate and including a silicon semiconductor and a first gate electrode on the first active layer, and a second transistor including a second active layer on the substrate and including an oxide semiconductor and a second gate electrode on the second active layer. The fan-out lines include first fan-out lines and second fan-out lines alternately arranged each other in one direction. The first fan-out lines are arranged on the same layer as the first gate electrode, and the second fan-out lines are arranged on the same layer as the second gate electrode.

Abstract: A method of forming a high electron mobility transistor (HEMT) includes: providing a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate; forming a first insulating layer on the barrier layer; and forming a gate contact, a source contact, and a drain contact on the barrier layer. An interface between the first insulating layer and the barrier layer comprises a modified interface region on a drain access region and/or a source access region of the semiconductor structure such that a sheet resistance of the drain access region and/or the source access region is between 300 and 400 ?/sq.

Abstract: A display panel includes a base substrate, pixels, signal lines, a power line, signal pads, power pads, and a conductive portion electrically connected to the power pads and extending from an area overlapping the power pads to an edge of the base substrate. An opening is defined in conductive portion by a removed portion thereof.

Abstract: The present disclosure provides a display substrate, a method of manufacturing a display substrate, and a display device. The display substrate includes: a base substrate; a color filter layer arranged on the base substrate, wherein the color filter layer includes a plurality of sub-color filters; and a monochromatic filter layer arranged on a side of the color filter layer away from the base substrate, wherein the monochromatic filter layer is formed as a filter layer with a fourth primary color, one of the first primary color, the second primary color and the third primary color is the same as the fourth primary color, or the first primary color, the second primary color, the third primary color and the fourth primary color are different from each other.

Abstract: A memory chip includes a memory cell circuit, a periphery circuit, an interconnect structure, and a control logic circuit. The periphery circuit is positioned under the memory cell circuit and electrically connected to the memory cell circuit. The interconnect structure is positioned on a side surface of the memory cell circuit. The control logic circuit is positioned under the interconnect structure. The control logic circuit is electrically connected to the interconnect structure and the periphery circuit and includes a dynamic random-access memory.

Abstract: A display device includes: a display panel; and a color conversion panel overlapping with the display panel. The color conversion panel includes: a substrate; a first color conversion pattern on the substrate; a second color conversion pattern on the substrate, and partially overlapping with the first color conversion pattern; a first reflective partition wall between the first color conversion pattern and the second color conversion pattern; a first color filter between the substrate and the first color conversion pattern; and a second color filter between the substrate and the second color conversion pattern.

Abstract: Provided are a microfluidic chip and a manufacturing method thereof, and a microfluidic device. The microfluidic chip comprises a first substrate structure comprising a plurality of pin areas comprising a first and a second pin area, a detection area, and a grounding trace. The detection area comprises a plurality of first scan lines extending along a first direction, each of which being connected to the first pin area through a corresponding first scan trace; a plurality of first data lines extending along a second direction, each of which being connected to the second pin area through a corresponding first data trace; a plurality of detection units, each of which comprising a first switching transistor connected to a corresponding first scan line and data line, a driving electrode, and a first hydrophobic layer. The grounding trace is connected to at least one detection unit and one of the pin areas.

Abstract: Picture quality deterioration is curbed. A solid-state imaging device according to an embodiment includes: a semiconductor substrate (131) including a light-receiving element; an on-chip lens (132) disposed on a first surface of the semiconductor substrate; a resin layer (133) covering the on-chip lens; and a glass substrate (134) disposed on the side of the first surface of the semiconductor substrate separately from the resin layer.

Abstract: A display device includes: a substrate in which a main display area, a first non-display area inside the main display area, and an auxiliary display area between the main display area and the first non-display area are defined; and a display unit including an auxiliary display and a main display. The auxiliary display is disposed on the auxiliary display area and includes a plurality of first auxillary pixels, a plurality of second auxillary pixels, and a plurality of third auxillary pixels. The main display is disposed on the main display area and includes a plurality of main pixels. The plurality of first auxillary pixels is commonly driven by a first driving signal, the plurality of second auxiliary pixels is commonly driven by a second driving signal, and the plurality of third auxillary pixels is commonly driven by a third driving signal.

Abstract: A display panel, a preparation method, and a display device are disclosed, including an array substrate, an organic light emitting diode (OLED) light emitting device disposed on a side of the array substrate, and a scattering layer disposed on a side of the OLED light emitting device away from the array substrate, wherein the scattering layer has a plurality of micropores.