Abstract: The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure and relates to the technical field of semiconductors. The manufacturing method of a semiconductor structure includes: providing a substrate, where the substrate includes a first region and a second region, the first region includes a plurality of independent first active regions, adjacent two of the first active regions are isolated by a first trench, and an isolating lamination layer is formed in the first trench; forming a barrier layer covering a top surface of the second region; forming an epitaxial layer covering a top surface of the first active region; and etching off the barrier layer and part of the isolating lamination layer in the first region, where joints of top surfaces of layers in the isolating lamination layer retained in the first region are basically consistent in height.

Abstract: Methods of depositing a molybdenum sulfide film with increased sulfur:molybdenum ratio are described. The methods include pre-cleaning a dielectric material with oxygen radicals prior to formation of a molybdenum sulfide film that has a lower oxygen content than would be formed without the pre-cleaning.

Abstract: A semiconductor memory device may include an active pattern on a substrate and at least partially surrounded by a device isolation pattern, a gate electrode that crosses the active pattern in a first direction parallel to a bottom surface of the substrate, the gate electrode including lower and upper portions, and a side-capping pattern on a top surface of the lower portion of the gate electrode. The side-capping pattern may be on a side surface of the upper portion of the gate electrode, and a top surface of the side-capping pattern may be located at a level lower than an uppermost surface of the device isolation pattern, relative to the bottom surface of the substrate where the bottom surface of the substrate is a base reference layer.

Abstract: An image sensing device including a Geiger-mode avalanche photodiode (GmAPD), a read out integrated circuit (ROIC), and a limit resistor connected to the GmAPD and the ROIC in series, wherein the ROIC includes an active quenching circuit.

Abstract: A semiconductor element may include a substrate including source and drain regions formed in the substrate apart from each other by a trench, a gate insulating layer covering a bottom surface and a sidewall of the trench, a gate electrode including lower and upper buried portions. The lower buried portion may be in the trench with the gate insulating layer therearound and fill a lower region of the trench. The upper buried portion may be on the lower buried portion with the gate insulating layer therearound and fill an upper region of the trench. The upper buried portion may include a two-dimensional material layer in the trench on an upper surface of the first conductive layer and an upper region of the sidewall of the gate insulating layer, and a second conductive layer in the upper region of the trench and surrounded by the two-dimensional material layer.

Abstract: An apparatus that includes a semiconductor substrate having first and second gate trenches arranged in parallel and extending in a first direction, and first and second gate electrodes embedded in the first and second gate trenches, respectively, via a gate insulating film. Each of the first and second gate electrodes includes a first conductive film located at a bottom of the respective first and second gate trenches and a second conductive film stacked on the first conductive film. The second conductive film included in a first portion of the second gate electrode is thinner than the second conductive film included in a first portion of the first gate electrode which is arranged adjacently to the first portion of the second gate electrode in a second direction crossing to the first direction. The second conductive film is lower in work function than the first conductive film.

Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.

Abstract: A light-emitting electronic device includes a first electronic component, a second electronic component, an insulating layer, a conductive layer, an anchor structure, and a tether. The first electronic component and the second electronic component respectively include semiconductor layers vertically stacked together, a first electrode, and a second electrode. The insulating layer extends along lower surfaces and sidewalls of the first electronic component and the second electronic component. The conductive layer is at least partially disposed in the insulating layer and is electrically connected to the second electrode of the first electronic component and the first electrode of the second electronic component. The anchor structure is laterally separated from the first electronic component and the second electronic component. The anchor structure includes semiconductor layers vertically stacked together.

Abstract: A method for forming a transistor structure includes steps as follows: A substrate with an original surface is prepared. Next a gate conductive region is formed, wherein at least a portion of the gate conductive region is disposed below the original surface, and a bottom wall and sidewalls of the gate conductive region is surrounded by a gate dielectric layer. Then, a first conductive region is formed, wherein a bottom wall of the first conductive region is aligned or substantially aligned with a top wall of the gate conductive region.

Abstract: A method for manufacturing a display panel is provided, the method including forming a semiconductor pattern on a base layer, applying at least one insulation layer on the semiconductor pattern, and applying a control electrode on the insulation layer so as to overlap at least a portion of the semiconductor pattern. The applying of the control electrode includes depositing molybdenum to form a preliminary electrode layer, forming a photoresist pattern on the preliminary electrode layer, and applying an etching gas to dry-etch the preliminary electrode layer. In an embodiment, in the dry-etching, the etching gas may include a nitrogen trifluoride gas, an oxygen gas, and a chlorine gas. Accordingly, it is possible to implement a manufacturing process of an eco-friendly display panel while increasing the yield and reliability of the display panel manufacturing process.

Abstract: Gate-all-around transistor devices and methods for manufacturing the same are provided. The semiconductor device includes a substrate. The substrate includes a plurality of isolation regions formed in the substrate, the plurality of isolation regions comprising an isolation material. The substrate further includes a buffer region formed in the substrate, the buffer region separating adjacent isolation regions. The semiconductor device further includes a plurality of fins, each fin formed on a corresponding isolation region of the plurality of isolation regions. Each fin includes a buffer layer contacting the isolation material and a plurality of silicon layers and a plurality of silicon germanium layers alternatingly arranged in a plurality of stacked pairs on the buffer layer.

Abstract: An integrated circuit includes a dielectric layer located over one or more metal interconnect layers. The dielectric layer includes selective regions of implanted stress-setting dopants to provide different stress profiles in the dielectric layer to counteract the stress imparted from package structures. Accordingly, the effect of the stress imparted by package structures in a substrate can be negated by the placement of stress-setting dopants in selective areas of the dielectric layer.

Abstract: Some embodiments relate to an integrated device including a first thin film transistor (TFT) arranged over a substrate; a second TFT arranged over the substrate; a metal barrier layer arranged over the second TFT, where the metal barrier layer is configured to block incident radiation from reaching the second TFT; a Fresnel lens arranged over the first TFT, where the Fresnel lens is configured to focus incident radiation towards the first TFT; and where the first TFT and the second TFT are configured to be coupled to a differential amplifier, the differential amplifier being operable to detect the incident radiation by comparison of a first leakage current from the first TFT to a second leakage current from the second TFT.

Abstract: A display panel and a display apparatus. The display panel includes: a base plate, an interconnection structure including at least two connection blocks and connection lines for connecting the at least two connection blocks; and a plurality of first sub-pixels located at a side of the interconnection structure away from the base plate and each including a first electrode, a first light-emitting structure and a second electrode stacked in sequence along a direction away from the interconnection structure; in which at least a part of the first electrode is located at a side of the connection block away from the base plate and electrically connected with the connection block, and an orthographic projection of the connection block on the base plate is at least partially staggered with an orthographic projection of the first light-emitting structure on the base plate.

Abstract: A monolithic focal plane array (FPA) device and method of fabrication. The method can include forming monolithic photodetectors or FPAs by heteroepitaxial growth of III-V PINs, APDs, or other photodetector devices in etched recesses of a Si-based read-out integrated circuit (ROIC) wafer. In a single-color device example, a wavelength configuring buffer layer and photodetector are grown within the etched recesses using compound semiconductor materials to enable infrared detection at desired wavelength(s). Depending on the application, this growth can be done on a graded compliant buffer layer and/or a selectively transparent buffer layer. And, semiconductor detectors can be incorporated to detect visible and NIR wavelengths in a dual-color device example. Further, the resulting devices can be configured as pixels in a sensor array device coupled to the ROIC device.

Abstract: A method for manufacturing an image sensing device includes forming a grid structure over a semiconductor substrate to provide spaces for disposing color filters, forming first color filters, second color filters, third color filters in some of the spaces defined by the grid structure, the first color filters, the second color filters, and the third color filters configured to transmit light corresponding to a first color, a second color, and a third color, respectively, forming an overcoating layer to cover the first to third color filters, the overcoating layer filling remaining spaces of the spaces defined by the grid structure, the remaining spaces free of the first to third color filters, and forming microlenses over the overcoating layer.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a wraparound gate structure and methods of manufacture. The structure includes: a channel region comprising semiconductor material; an isolation structure surrounding the channel region; a divot within the isolation structure; and a gate structure comprising gate material within the divot and surrounding the channel region.

Abstract: A semiconductor device includes a semiconductor substrate, an active region on the semiconductor substrate and including a first semiconductor material, an isolation layer on the semiconductor substrate and a side surface of the active region, a first gate structure in a first gate trench crossing the active region, a second gate structure in a second gate trench in the isolation layer, the second gate structure being parallel to the first gate structure and adjacent to the active region, a semiconductor layer covering at least a part of the side surface of the active region, the semiconductor layer including a second semiconductor material different from the first semiconductor material, and at least a part of the semiconductor layer being between the active region and the second gate structure, and source/drain regions in the active region on opposite sides of the first gate trench.

Abstract: A solid-state imaging element with pixel transistors and wires capable of efficiently outputting and transferring a pixel signal from a stacked photoelectric conversion film while suppressing an increase in manufacturing cost, and a manufacturing method thereof are provided.

Abstract: An image sensing device and a method for forming the same are disclosed. The image sensing device includes a first substrate, first photoelectric conversion elements formed in the first substrate and configured to generate photocharges in response to a reception of light, a second substrate formed over the first substrate, and second photoelectric conversion elements formed in the second substrate and configured to generate photocharges in response to a reception of light, the second photoelectric conversion elements contacting corresponding the first photoelectric conversion elements, respectively.