Abstract: Probe cards are configured with protective circuitry suitable for use in electrical testing of semiconductor dice without damage to the probe cards. Protective fuses are provided in electrical communication with conductive traces and probe elements (e.g., probe needles) of a probe card. The fuses may be active or passive fuses and are preferably self-resetting, repairable, and/or replaceable. Typically, the fuses will be interposed in, or located adjacent to, conductive traces residing over a surface of the probe card. Methods of fabricating a probe card are provided, as well as various probe card configurations. A semiconductor die testing system using the probe card is also provided.
Abstract: On a clock supply route to a specified block such as a ROM, there are provided a clock delay circuit which includes a plurality of delay elements connected in series and a selector, such that a delay clock signal is selected and output in accordance with a delay control signal. During a product test, an operation test for the specified block is carried out in order to find out the delay adjustment signal that exhibits a proper operation. For this purpose, the delay adjustment signal is supplied from a delay adjustment terminal via a selector. When a value of the delay adjustment signal is obtained in the product test, the value of the delay adjustment signal is memorized to a delay setting circuit including a fuse circuit or a PROM. In a normal operation, the memorized value in the delay setting circuit is supplied to the clock delay circuit via the selector.
Abstract: Some of the members constituting a semiconductor element are formed from ?-Si and an HSG forming process is implemented to form hemispherical polysilicon grains at some of the members formed from ?-Si. Thus, a semiconductor device that is achieved without requiring a great number of manufacturing steps such as film formation and etching, facilitates control of the individual steps and assures reliable electrical connection between the members and a method of manufacturing such a semiconductor device are provided.
Abstract: The invention includes a method and apparatus for electrical contact testing of LCD panels. In this invention the said system apparatus consists of a frame, x,y,z translation devices, a vision unit, a rotary direct drive mechanism for positioning, an integrated tester, LCD holding device, and a probe card. Electrical contact testing is achieved via: A LCD panel to be electrically tested is placed on the chuck and held down with vacuum. The x-y translation device then aligns the fixed substrate with the test head and probe card via a vision unit. The rotary mechanism corrects for any angular errors for accurate probe contact. Once aligned the probe device makes contact with the bond pads located on the panel. Electrical test signals are then sent from the integrated tester via probe card pins to measure storage capacitance to determine defects present in the panel.
Abstract: A spindle motor adapted to be loaded with a disk provided with an attracted plate and to rotate the disk is provided which comprises a turn table having a flange portion on a front surface of which the disk is to be mounted and on a back surface of which a rotor yoke is supported, and a cylindrical portion a distal end of which is to be opposed to the attracted plate, the turn table being supported on a housing of a stator through a rotational shaft; an attraction magnet fixed to the distal end of the cylindrical portion of the turn table, and an aligning member an inner periphery of which is engaged with an outer periphery of the cylindrical portion and an outer periphery of which is to be brought into contact with an inner periphery of a center hole of the disk to align the disk; and an urging member interposed between the aligning member and the flange portion of the turn table to urge the aligning member by restoration force, wherein the urging member is comprised of an annular spring material with a plur
Abstract: A test head for a semiconductor integrated circuit tester, the test head includes a housing, a backplane structure attached to the housing in a manner permitting pivotal movement of the backplane structure relative to the housing, and a latch mechanism for forcing the backplane structure towards its closed position. The latch mechanism includes a cam follower that projects from the backplane structure in a direction perpendicular to the axis of pivotal movement of the backplane structure, a cam plate that is attached to the housing and is moveable relative to the housing and is formed with a cam slot for receiving the cam follower, and a drive mechanism effective to drive the cam plate to move relative to the housing. In the event that the cam follower is located in the working region of the cam slot, movement of the cam member in one direction urges the backplane structure towards the closed position and movement in the opposite direction urges the backplane structure away from the closed position.
Abstract: A system for testing and recording temperatures of a central processing unit (CPU) includes a temperature detecting unit (11) for detecting a current temperature of the CPU at a test time; a temperature data storing unit (12) for storing test results at different test times; a temperature data processing unit (13) for generating test results and comparison results; a temperature monitoring unit (14) for receiving the comparison results and transmitting corresponding control signals; and a test result outputting unit (15) for displaying an indicator light denoting a grading of the CPU and outputting the test results. The temperature data processing unit includes: a temperature data storing module (21), a temperature data obtaining module (22), a temperature setting module (23), a temperature comparing module (24), a test time setting module (25), a testing period comparing module (26), and a test result outputting module (27). A related method is also disclosed.
Abstract: A semiconductor device test apparatus, has: a socket, which connects to a semiconductor device undergoing testing mounted thereon; a test tray, which houses the semiconductor device undergoing testing and which is provided, in a position on which the semiconductor device undergoing testing is mounted, with a first electronic cooling element that absorbs heat via one surface thereof and releases heat via the other surface thereof; and a contact block, which is provided with a second electronic cooling element that makes contact with the top of the semiconductor device undergoing testing in a state in which the semiconductor device undergoing testing is mounted on the socket.
Abstract: A contactor is provided which contactor comprises an insulating substrate, a concave portion formed in the insulating substrate and extending in a perpendicular direction from a surface thereof, and elastic conductive particles disposed in the concave portion. A part of one of the conductive particles protrudes from the surface of the insulating substrate.
Abstract: In a device for the investigation of components of a generator which border on a machine air gap (29) between stator and rotor (22), with the rotor (22) built in, by means of at least one moveable inspection probe (35), a simple, flexible and rapid mounting is ensured in that the device comprises a base unit (31) which can be secured to the rotor (22) on both sides, and which permits at least one inspection probe (35) to move in the machine air gap (29), both in an axial direction with respect to the generator axis and also in the circumferential direction of the machine air gap (29) over the whole circumference of the rotor.
January 28, 2002
Date of Patent:
August 2, 2005
Alstom Technology Ltd.
Peter Haeusermann, Ingo Kirchhoff, Bernhard Mark, Peter Stutz
Abstract: A method for testing a high power SMD type IC with a method for making manual and automation test base includes the following steps: provide a test socket for the SMD type IC; inversely place the SMD type IC on a lower base of the test socket in a way of the character side thereof facing downward and the connection pins facing upward; and place an upper base on the SMD type IC and the lower base so as to be fixed. By way of the SMD type IC being inversely placed, it is possible for the connection pins of the IC to increase the area of the connection pins on the IC contacting with the connection pins of lower base in the test socket and it is possible for the 8° slant angle of each connection pin on the IC not to become damaged while the IC 1 is fixed to the test socket forcefully. In this way, the contact impedance of each connection pin can be lowered such that the test socket can endure greater current during the high power SMD type IC being tested.
Abstract: A digital eddy current proximity system including a digital impedance measuring device for digitally measuring the proximity probes impedance correlative to displacement motion and position of a metallic target object being monitored. The system further including a cable-length calibration method, an automatic material identification and calibration method, a material insensitive method, an inductive ratio method and advanced sensing characteristics.
Abstract: A sliding means with built-in moving-magnet linear motor is provided, realizing high-speed operation and much response ability of a table to a stationary bed, and also accurate position control of the table to the bed. With the sliding means of this invention, armature windings carry a three-phase current while a driving circuit is transferred to the external driver to make the bed slim in construction. Thus, the sliding means is reduced in overall height. A field magnet of rare earth permanent magnet is effective in raising flux density, thereby providing high propulsion for the table. An encoder to monitor a position of the table is an optical encoder having an optical linear scale, which contributes to improvement in accurate monitoring. The construction in which the armature windings connected to cords, lines, and so on are placed on the stator side has no fear of causing dust and dirt, thus realizing clean environment.
Abstract: A measurement circuit for measuring input voltages in an automatic test system includes a pedestal source, a differential amplifier, and a feedback amplifier. The differential amplifier measures a “residue,” i.e., a difference between an input signal and a pedestal signal from the pedestal source, which is programmed to equal an expected input voltage. The feedback amplifier boosts the residue before it is presented to the differential amplifier, and thus allows the differential amplifier to be operated at lower gain than is typically used in conventional topologies. Consequently, the effect of the errors in the differential amplifier are reduced.
Abstract: The present invention is to provide a method for measuring resistivity of a semiconductor wafer by the use of an AC-SPV method even though the wafer is left in a depletion state or a weak inversion state.
Abstract: In an inexpensive electric tool, a thin insulating layer is provided by pouring an insulating resin material by the injection molding to extend from a rotor supporting portion 1a formed in an outer casing to an inner surface or inner and outer surfaces of the outer casing. Also, as another configuration and method, an insulating piece 12a for covering the inner surface of the rotor supporting portion is provided, and also an insulating block for covering the rotor supporting portion and supporting ribs is provided.
Abstract: An apparatus and method to simultaneously measure electric and thermal fields with a single probe. Using an electrooptic semiconductor probe, the Pockels effect is employed to measure electric field magnitude and phase, and the effect of photon absorption due to bandtail states in the semiconductor is used to measure temperature. Techniques to scale relative electric-field measurements to absolute units (volts/meter), stabilize electric-field phase drift, and calibrate electric-field data that is corrupted when the probe is used in regions where temperature gradients exist are provided.
March 6, 2002
Date of Patent:
June 14, 2005
The Regents of the University of Michigan
Ronald M. Reano, John F. Whitaker, Linda P. B. Katehi
Abstract: A two-dimensional ultrasound phased array transducer includes an acoustic backing, a first circuit, which may be a flexible circuit disposed over the acoustic backing or a ground plane, an acoustically absorptive interface layer disposed over the flexible circuit, and a piezoelectric layer disposed over the interface layer. A matching layer may be disposed over the piezoelectric layer, and a second circuit, which may be a ground plane or a flexible circuit, may be disposed over the matching layer. The piezoelectric layer and the matching layer are diced by forming kerfs extending through these layers and at least partially into the interface layer. Extending the kerfs into the interface layer reduces cross-talk between elements, electrically isolates the elements, and facilitates manufacturing by reducing the precision required in controlling the depth of the cut.
March 31, 1999
Date of Patent:
May 17, 2005
Koninklijke Philips Electronics N.V.
Rodney J Solomon, Walter Patrick Kelly, Jr.
Abstract: A system for detecting motion and proximity by determining capacitance between a sensor and an object. The sensor includes sensing surfaces made of a thin film of electrically conductive material mounted on a non-conductive surface. In another embodiment, the sensor is a human body. The sensor senses the capacitance between a sensor's surface and an object in its vicinity and provides the capacitance to a control system that directs machine movement. Because the sensor does not require direct contact or line-of-sight with the object, a machine can be controlled before harm occurs to the object.
Abstract: A method of testing an integrated circuit includes setting a guardbanded limit for a parameter associated with an embedded node, a deviation from the guardbanded limit under a set of test conditions correlated with a failure of the integrated circuit across a range of operating conditions. A test is performed under the test conditions to detect deviations of the parameter from the guardbanded limit to detect failures of the integrated circuit over the range of operating conditions.
April 5, 2002
Date of Patent:
April 26, 2005
Cirrus Logic, Inc.
Axel Thomsen, Sherry Wu, Murari Kejariwal, Ammisetti Prasad, John Laurence Melanson