Patents Examined by Nghia Doan
  • Patent number: 10026547
    Abstract: The present application provides a coil for facilitating an electromagnetic coupling and method for increasing the degree of an electromagnetic coupling. The coil for facilitating an electromagnetic coupling includes one or more loops formed from a material through which an electric current can flow. At least one of the one or more loops is adjustable, including at least one of a size and a shape of the at least one of the one or more loops of the coil being selectively adjustable.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 17, 2018
    Assignee: Motorola Mobility LLC
    Inventors: Martin R Pais, David A Winkler
  • Patent number: 10027157
    Abstract: A method for wirelessly charging a battery in an implantable medical device including the steps of: providing a receiver in the implantable medical device and providing a temperature sensor in the implantable medical device. The method also includes receiving, via the receiver, a wireless power signal from an external charger and converting the wireless power signal into a battery charge signal including power for recharging the battery. The method yet also includes sensing a temperature of the implantable medical device with the temperature sensor. The method further includes changing a current of the battery charge signal from a first non-zero current to a second non-zero current that is different from the first non-zero current. Changing of the current of the battery charge signal is based on the temperature sensed by the temperature sensor.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: July 17, 2018
    Assignee: Nuvectra Corporation
    Inventors: Michael Labbe, Les Halberg, Benjamin Cottrill
  • Patent number: 10019546
    Abstract: A system-on-a-chip (SoC) includes a master module and a first adapter module. The master module includes an upstream interface and a downstream interface. The upstream interface is coupled to a host unit for receiving a write burst or a read burst therefrom. The master module is configured to convert the write burst or the read burst into a series of access requests to the downstream interface. The first adapter module includes an input interface, an output interface, and an endpoint interface, and an address Base Address Register (BAR). The input interface is coupled to the downstream interface of the master module. The output interface is coupled to a second adapter module or to a termination module. The endpoint interface is coupled to a first functional unit or to a third adapter module. The first adapter module is configured to detect a respective access request corresponding to the address BAR.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 10, 2018
    Assignee: Amazon Technologies, Inc.
    Inventor: Gil Stoler
  • Patent number: 10002881
    Abstract: A standard cell for use within an integrated circuit can be partially personalized by local wiring. The standard cell can include a set of transistors, each having a fixed size and position within an established standard cell perimeter. The set of transistors can be partially interconnected to a set of local nodes by local wiring. Customization ports can be arranged on a global wiring layer and electrically connected to the set of local nodes. A set of blockage in shapes can be arranged to identify, on a global wiring layer, areas reserved for personalization wiring. Personalization wiring can be configured to complete the personalization of the standard cell by electrically interconnecting, on the global wiring layer, some of the set of customization ports.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ayan Datta, Ankur Shukla, James D. Warnock
  • Patent number: 9997814
    Abstract: A zinc-air cell, a battery which is a low weight, low volume, or higher energy system, or a combination thereof and an apparatus for recharging the same are disclosed.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: June 12, 2018
    Assignee: PHINERGY LTD.
    Inventor: Jonathan R. Goldstein
  • Patent number: 9990456
    Abstract: The present disclosure relates to a method for routing in an electronic circuit design. Embodiments may include receiving, at one or more computing devices, the electronic circuit design having a plurality of terminal pads associated therewith. Embodiments may further include generating a change in at least one of a size or an existence of at least one of the plurality of terminal pads. Embodiments may also include routing a portion of the electronic design based upon, at least in part, the generated change.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: June 5, 2018
    Assignee: Cadence Design Systems, Inc.
    Inventors: Randall Scott Lawson, Brett Allen Neal, Richard Allen Woodward, Jr., Edmund J. Hickey
  • Patent number: 9985444
    Abstract: A method for equalizing states of electric storage devices, which are connected in series, of an electric storage device assembly, includes preparing discharging time period data including discharging time periods associated with sequential numbers, determining whether a voltage of each electric storage device has reached a reference voltage during charging or discharging of the electric storage device assembly, and discharging the electric storage devices, using a discharging circuit, for respective discharging time periods associated with the sequential numbers, the sequential numbers being assigned to the electric storage devices according to a sequence of the electric storage devices determined based on time points at which the voltages of the electric storage devices have reached the reference voltage.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 29, 2018
    Assignee: GS YUASA INTERNATIONAL LTD.
    Inventor: Takeyuki Shiraishi
  • Patent number: 9966769
    Abstract: A battery charging monitor is provided including a non-invasive sensor electrically connected to at least one battery cell of at least one battery, which is configured to measure an internal temperature of the at least one battery cell. The non-invasive internal temperature sensor is connected to the microcontroller that is configured to determine a rate of change of the internal temperature of the at least one battery cell based on the internal temperature of the at least one battery cell, determine a state of charge of the at least one battery cell based on the rate of change of the internal temperature, and cause a charging rate to be applied, by a battery charger, to the at least one battery cell based on the determined state of charge.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: May 8, 2018
    Assignee: The Johns Hopkins University
    Inventors: Rengaswamy Srinivasan, Bliss G. Carkhuff, Lakshminarayan Srinivasan
  • Patent number: 9948118
    Abstract: An apparatus has connectors to receive batteries. A power multiplexer is connected to the connectors. A processor is connected to the power multiplexer to execute a battery charge protocol including the operations of selecting at least one battery for charging, where the at least one battery is in a fast charge state that allows for substantially linear charge performance. Direct current is applied to the battery until the fast charge state is terminated. The selecting and applying operations are repeated until the fast charge state is terminated in each of the batteries. Direct current is then directed to the batteries until a full charge state is reached for each of the batteries.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: April 17, 2018
    Assignee: Ampl Labs, Inc.
    Inventors: Michael Patton, Keith Resch, Rafael Calderon, Tomoko Nishioka-Patton
  • Patent number: 9946828
    Abstract: A method of designing a layout of an integrated circuit (IC), which is implemented by a computer system or a processor, includes receiving input layout data, and performing a design rule check with regard to a plurality of patterns. The method includes, merging, from among a first pattern and a second pattern against the design rule, the first pattern with a third pattern connected to a same net as the first pattern, and generating output layout data.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: April 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Tae Kim, Ha-Young Kim, Jae-Woo Seo
  • Patent number: 9940421
    Abstract: Simultaneous automatic placement and routing speeds up implementation an integrated circuit layout and improves the resulting layout such that the layout is more compact, has reduced parasitics, and has improved circuit performance characteristics (e.g., power, frequency, propagation delay, gain, and stability). A technique generates solutions based on a random normalized polish expression, and includes cost considerations based on routing of interconnect.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: April 10, 2018
    Assignee: Pulsic Limited
    Inventors: Mark Waller, Paul Clewes, Liang Gao, Jonathan Longrigg
  • Patent number: 9929571
    Abstract: An integrated battery control system for energy storage incorporates a power control system to reliably provide power to a load and protects lithium ion batteries from over-charging and over-discharging. One or more power sources, such as renewable power sources, such as solar or wind power generators, or a generator, may be coupled with the integrated battery control system to provide power for charging the battery pack and/or for supplying power to said load. A portion of the power from a power source may be used to charge the battery pack and a portion may be provided to a load. A control circuit and one or more microprocessors may control the components of the system to provide power in an efficient manner. Power to and from the battery may run through an inverter and a control system may open and close switches to control flow of power in the system.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: March 27, 2018
    Assignee: Elite Power Solutions LLC
    Inventors: Yuan Dao, William Jeffrey Schlanger
  • Patent number: 9923399
    Abstract: Embodiments of the present invention relate to a battery stack controller system. The system may include a plurality of battery cell stages with cell controller systems (as described above with respect to the first embodiment). The system may also include a stack controller to send charge/discharge commands to the battery stack via a communication network. The stack controller may send the commands to the battery stack based on the requirements of a load or the state of the battery cell stages. The battery cell stages may either comply with the commands or send the commands to neighboring cells via the communication network.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: March 20, 2018
    Assignee: Analog Devices, Inc.
    Inventors: James C. Camp, Thomas M. MacLeod
  • Patent number: 9917469
    Abstract: A number of variations may include a phone charger assembly that may include a housing assembly that may include a retainer body, a housing, a housing liner, a vent, and trim which may be constructed and arranged to house a cell phone. The housing may be dimensioned to store a multitude of cellphones in a vertical position. The phone charger assembly may further include a pawl assembly that may include a pawl ratchet, a plurality of screws, a pawl, and a release wherein the pawl assembly is constructed and arranged to raise and lower the housing within the phone charge assembly. Additionally, the phone charger assembly may include a gear rail assembly which may include at least one gear rail and at least one dampener. The gear rail assembly and pawl assembly may be constructed and arranged to raise and lower the housing within the phone charge assembly.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: March 13, 2018
    Assignee: GM Global Technology Operations LLC
    Inventors: Timothy A. Kiester, Jason C. Bone
  • Patent number: 9916415
    Abstract: Disclosed are embodiments for modeling integrated circuit (IC) performance. In these embodiments, a parasitic extraction process is performed to generate a netlist that, not only accounts for various parasitics within the IC, but also accounts for substrate-generated signal distortions (e.g., substrate-generated harmonic signal distortions) that occur within the IC. During this netlist extraction process, the design layout of the IC is analyzed to identify parasitics that are to be represented in the netlist and to also identify any circuit elements with output signals that are subject to substrate-generated signal distortions. When such circuit elements are identified, signal distortion models, which were previously empirically determined and stored in a model library, which correspond to the identified circuit elements, and which account for the signal distortions, are selected from the model library and incorporated into the netlist.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: March 13, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Frederick G. Anderson, Michael L. Gautsch, Jean-Marc Petillat, Philippe Ramos, Randy L. Wolf, Jiansheng Xu
  • Patent number: 9917471
    Abstract: A mobile solar array is provided which can be reconfigured between an operational (i.e. flat) configuration, and a retracted (i.e. folded) configuration. This is a two-step process. First, the structure that supports the solar array in its operation configuration on a docking pad is collapsed. This lowers the solar array toward the docking pad. Next, the solar array, which includes three sections of photovoltaic modules is folded lengthwise. Specifically, side sections of the solar array are folded out-of-plane from the center section. This places the solar array in its retracted configuration.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: March 13, 2018
    Assignee: ENVISION SOLAR INTERNATIONAL, INC.
    Inventors: Desmond Wheatley, Patrick Senatore
  • Patent number: 9910953
    Abstract: A metrology design and verification framework is provided, which includes methods and systems for metrology structure identification in an integrated circuit design data block, design rule checking, hierarchal design of metrology target structures to minimize random errors, and metrology design rule verification of metrology target design files. In-die metrology targets are identified using various filtering methods and/or designed as hierarchical structure within dies or outside the dies. Particularly, metrology target design files are generated, which are hierarchical in structure and compatible with design rule checks. Design rule check takes into account the hierarchical and often repetitive target designs in the verification process. Layouts may be verified using design rule checks at different levels of design rules, which may be combined to remove rule violations and errors prior to actual target production.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: March 6, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Michael Adel, Tal Shusterman, Chen Dror, Ellis Chang
  • Patent number: 9906062
    Abstract: Methods, systems, and apparatuses for charging a host device from a charging source through an accessory are described. Upon detecting an input power signal from the charging source, an accessory may send an identification request to the host device and authenticate the host device based on the identification information received from the host device. Upon authenticating the host device, the accessory may enable a power path between the charging source and the host device to supply a charging current to charge the host device.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: February 27, 2018
    Assignee: APPLE INC.
    Inventors: Jeffrey J. Terlizzi, Jonathan J. Andrews, Alexei Kosut, James M. Hollabaugh, Zachary C. Rich, Daniel J. Fritchman
  • Patent number: 9892227
    Abstract: Systems, methods and storage media are provided for clock tree power estimation at register transfer level. For example, a physical power model is generated based at least in part on a reference post-layout design. A clock tree is modeled at register transfer level based at least in part on the physical power model. Power estimation is performed for the modeled clock tree at the register transfer level.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: February 13, 2018
    Assignee: Ansys, Inc.
    Inventor: Ajay Singh Bisht
  • Patent number: 9875334
    Abstract: An illustrative method includes providing a layout of at least a portion of a photomask, the layout comprising a plurality of target features, each target feature having a shape in accordance with a corresponding one of at least one target shape, for each of the target shapes, providing a local map specifying a respective value of a local sub-resolution assist feature (SRAF) usefulness for each of a plurality of positions relative to the target shape, generating a global usefulness map specifying a respective global SRAF usefulness for each of the plurality of positions relative to at least a portion of the photomask on the basis of the assignment of the values of the local SRAF usefulness.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: January 23, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Andrey Lutich