Patents Examined by Nitin G Patel
  • Patent number: 11461110
    Abstract: Systems and methods are provided for automated and distributed configuration of platform deployments on remote computing devices, such as laptop computers. The platform deployments can include services that mirror that of a server-based platform deployment. A centralized entity be used to generate and/or edit a single configuration file that contains multiple subset configuration files, each corresponding to a service to be deployed to each of the remote computing devices. The configuration file can be customized for the remote computing devices. Additionally, interaction between services can be achieved by using a templating language that allows certain aspects of the configuration file to include references to values.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: October 4, 2022
    Assignee: Palantir Technologies Inc.
    Inventors: Jeffrey Martin, Meghana Bhat, Nicholas Morgan
  • Patent number: 11340685
    Abstract: A system on chip (SoC) includes a plurality of intellectual property (IP) blocks and a clock management unit (CMU) configured to perform clock gating on at least one of the IP blocks. The IP blocks and the CMU interface with one another using a full handshake method. The full handshake method may include at least one of the IP blocks sending a request signal to the CMU to begin providing a clock signal or to stop providing the clock signal, and the CMU sending an acknowledgement signal to the corresponding IP block in response to receipt of the request signal.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: May 24, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Gon Lee, Ah Chan Kim, Jin Ook Song, Jae Young Lee, Youn Sik Choi
  • Patent number: 11243604
    Abstract: Dynamic voltage and frequency scaling (DVFS) is performed based on a power step by setting a plurality of power levels corresponding to a plurality of available frequencies of a clock signal for an operation of a processor, setting a plurality of power steps corresponding to the plurality of available frequencies, and controlling a conversion between the plurality of power levels based on a utilization of the processor and the plurality of power steps. Performance and power consumption of a processor are controlled efficiently by performing power level conversion based on the power step.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: February 8, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jonglae Park, Youngtae Lee, Choonghoon Park, Hyunchul Seok, Kwanjin Jung
  • Patent number: 11237616
    Abstract: A method, computer program product, and/or system associates a number of tokens with a plurality of frequency domains (for example, cores) of a central processing unit (CPU) computer chip. The number of tokens allotted to the CPU is based on the CPU power budget. Cores are organized as a ring topology. A token pool traverses the ring, picks up excess tokens from cores having excess tokens, and gives the tokens to cores that need additional tokens. Tokens acquired by a core allows the core to increase operating frequency by an increment represented by the tokens. Consequently, power usage is weighted toward heavily loaded cores and away from lightly loaded cores. Overall power usage of the CPU remains within a power budget. The method budgets power optimally to sustain turbo frequencies for longer durations by not allowing control units to increase frequency in absence of any useful high frequency benefiting workload.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 1, 2022
    Assignee: International Business Machines Corporation
    Inventors: Parth Sanjaybhai Shah, Ranjal Gautham Shenoy, Vaidyanathan Srinivasan, Alper Buyuktosunoglu, Augusto Vega, Pradip Bose
  • Patent number: 11194373
    Abstract: Various embodiments comprise prioritizing frequency allocations in thermally- or power-constrained computing devices. Computer elements may be assigned ‘weights’ based on their priorities. The computer elements with higher weights may receive higher frequency allocations to assure they receive priority in processing more quickly. The computer elements with lower weights may receive lower frequency allocations and suffer a slowdown in their processing. Elements with the same weight may be grouped together for the purpose of frequency allocation.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: December 7, 2021
    Assignee: Intel Corporation
    Inventors: Asma Al-Rawi, Federico Ardanaz, Jonathan M. Eastep, Nikhil Gupta, Ankush Varma, Krishnakanth V. Sistla, Ian M. Steiner
  • Patent number: 11175715
    Abstract: A method of supplying electric power to a computer system compliant with specification provided by the OCP is provided. The method includes: a PLU setting an OCP_V3_EN signal to a high level so as to make the computer system operate in a first mode; a BMC obtaining card data from an OCP card when the computer system operates in the first mode; the BMC determining whether standby power provided by a PSU in the first mode is sufficient according to the card data; and when it is determined that the standby power is not sufficient, the BMC controlling the PLU to make the computer system operate in a second mode requiring more electric power, and to then control the PSU to provide main power that is greater than the standby power to the OCP card.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: November 16, 2021
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventor: Chi-Yu Wang
  • Patent number: 11126256
    Abstract: Methods and apparatus for performing timed functions in battery-powered, wireless electronic devices, such as sensors or control modules. Such electronic devices comprise a main processor and a co-processor. When the main processor enters a quiescent state in order to preserve battery life, one or more timed functions are transferred from the main processor to the co-processor just before the main processor enters the quiescent state. When the co-processor determines that it is time to perform the timed function, the co-processor wakes the main processor in order for the main processor to perform the timed function.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: September 21, 2021
    Assignee: Ecolink Intelligent Technology, Inc.
    Inventor: Brandon Gruber
  • Patent number: 11106472
    Abstract: A method for managing storage of an operating system in an integrated circuit card, includes: subdividing an operating system into a plurality of operating system components; associating one or more operating system components of the plurality of operating system components to a descriptor indicating a version of the one or more operating system components; downloading the one or more operating system components to a memory of the integrated circuit card, wherein the downloading includes verifying if an operating system component stored in the integrated circuit card is a same version of the one or more operating system components being downloaded; based on the verifying, storing the one or more operating system components in the card if the version is different; and based on the verifying discarding the one or more operating system components from the download operation if the version is the same.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: August 31, 2021
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Pasquale Vastano, Amedeo Veneroso