Patents Examined by Nitrin Parekh
  • Patent number: 10896880
    Abstract: A semiconductor package includes a substrate. A high-frequency chip and a circuit component susceptible to high-frequency interference are disposed on a top surface of the substrate. A first ground ring is disposed on the substrate around the high-frequency chip. A first metal-post reinforced glue wall is disposed on the first ground ring to surround the high-frequency chip. A second ground ring is disposed on the top of the substrate around the circuit component. A second metal-post reinforced glue wall is disposed on the second ground ring to surround the circuit component. Mold-flow channels are disposed in the first and second metal-post reinforced glue walls. A molding compound covers at least the high-frequency chip and the circuit component. A conductive layer is disposed on the molding compound and is coupled to the first metal-post reinforced glue wall and/or the second metal-post reinforced glue wall.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 19, 2021
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang