Patents Examined by Nvineeta S Panwalkar
  • Patent number: 11804867
    Abstract: A noise reduction system for a digital receiver reduces noise in signals received at the digital receiver. The digital receiver includes an input for receiving an analogue signal, analogue signal processing circuitry for processing an analogue signal, and an output for providing the processed signal to a digital signal processor. The noise reduction system is located between the input and the digital receiver input, and includes a first component that outputs results of a noise signal identification and a second component that applies one or more counter-measure to the received analogue signal to produce a modified analogue signal. The modified analogue signal has a reduced level of noise compared to the received analogue signal, wherein the noise reduction system is arranged to assess the effectiveness of the one or more counter-measures applied by the second component to determine whether any further counter-measures are required.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: October 31, 2023
    Inventor: Philip Shaw