Abstract: A tenant processor module is shown comprising a processor core, a plurality of strapping devices, and an input bus. The plurality of strapping devices are configured to indicate configuration information to a receiving circuit board assembly coupled to the processor module. The input bus, coupled to the processor core, receives the configuration information back from the circuit board assembly and provides them to the processor core at a first time. At a second time, the input bus receives operational data from the circuit board assembly and provides them to the processor core.

Abstract: A method for programming a microprocessor using first and memory banks, a reset circuit, and an address decode circuit. The first bank of memory contains a current program. The second bank of memory contains an updated program. The microprocessor is initially booted using the current program, and then rebooted using the updated program. During the second reboot using the updated program, the microprocessor performs diagnostics to verify that the updated program is operational and/or error free. If the updated program is operational and/or error free, the updated program is used for future initial boots. If the updated program is not operational and/or error free, the microprocessor reboots using the current program, and a fail signal is generated, so that the updated program can be replaced.