Abstract: In a MOS semiconductor device utilizing a crystalline silicon substrate, the formation of a parasitic channel is suppressed. A solution of nickel acetate is applied silicon substrate 101 to form a layer including nickel indicated by 102. Thermal oxidation is performed to form a field oxide film 103 for device separation. At this time, a halogen element is included in the atmosphere. At this step, the action of nickel suppresses the formation of defects at the interface between the oxide film 103 and a channel region 106 and in the vicinity thereof, thereby suppressing the formation of a parasitic channel. Further, as a result of the action of the halogen element, nickel is gettered into the thermal oxidation film 103.

Abstract: This invention describes a method of controlling light emission from porous silicon and porous silicon devices using ion implantation. The emitted light intensity can be either selectively increased or decreased by suitable processing of the silicon prior to the fabrication of the porous layer. Amorphizing the silicon prior to the fabrication of the porous layer quenches the light emission. Ion implantation with doses below the amorphization level enhances the intensity of the emitted light of the subsequently fabricated porous layer.

Abstract: A single crystal pulling apparatus of the Czochralski method type wherein the cylindrical heater is supported not only by the two existing electrodes which are vertically shiftable but also by one or more vertical shafts, which may be electrodes or electrically insulated dummy electrodes; the vertical shafts are capable of shifting vertically in synchronism with the existing two electrodes, and are arranged in a manner such that the existing two electrodes and the vertical shafts are at regular intervals along the bottom circumference of the cylindrical heater.

Abstract: Method and apparatus for vapor phase free methyl radical transport of indium dopant species for precise predetermined reproducible doping concentrations to control electrical properties for MOCVD grown materials.

Abstract: A method of providing sublayer contacts in vertical walled trenches is proposed. In accordance with the present invention, the phosphorus doped amorphous silicon is deposited at temperatures less than 570.degree. C. The conversion into the extremely large crystal low resistivity polysilicon is accomplished by a low temperature anneal at 400.degree. C. to 500.degree. C. for several hours and a short rapid thermal anneal (RTA) treatment at a high temperature approximately 850.degree. C. for twenty seconds. These two conversion heat treatments are done at sufficiently low thermal budget to prevent any significant dopant movement within a shallow junction transistor. After anneal, the excess low resistivity silicon is planarized away by known techniques such as chemical/mechanical polishing.

Abstract: Method of manufacturing an infrared detector having a refractory metal (16) within the metal-insulator-semiconductor structure (MIS) provides a process applicable for high volume production of infrared focal plane array detectors. The process of the present invention uses a refractory metal such as tantalum as the gate (16) which is less susceptible to the etching by the bromine solution used to etch the vias (22) as compared to aluminum. Additionally, the etching of the refractory metal film to form the MIS structure can be done with a fluorine-containing plasma, thus avoiding the corrosion of the metal associated with etching aluminum metal films in a chlorine-containing plasma.

Abstract: A method for producing an amorphous silicon thin film transistor array substrate comprising successively coating a gate insulating layer, an amorphous silicon layer and a protective insulating layer on a glass substrate provided with a gate electrode and a gate wiring having a predetermined shape, in such a manner as to not cover the connecting terminal region of the gate wiring. A protective insulating layer is patterned into a predetermined shape. After passing through a predetermined production process to produce an amorphous silicon thin film transistor array, at least a gate wiring and a source wiring are provided. The step of patterning the protective insulating layer comprises covering the connecting terminals of the gate wiring and the exposed region of the glass substrate with a photoresist.

Abstract: An apparatus for producing semiconductor devices includes: a wafer splitting device for splitting a semiconductor wafer into individual dice; an automatic warehouse for lead frames for storing a plurality of kinds of lead frame; an assembly device for assembling a die and a lead frame into a semiconductor device; an automatic die/lead frame transport device for transporting the dice split by the splitting device and lead frames stored in the automatic warehouse to the assembly device; and a computer for controlling the automatic die/lead frame transport device to transport the lead frames of the type and quantity corresponding to the dice split by the splitting device, from the automatic warehouse to the assembly devices. The computer compares the number of non-defective dice with a predetermined production quantity and ensures that a sufficient quantity of non-defective dice to satisfy the production quantity are split and transported to the assembly device.

Abstract: In a catalytic cracking process for heavy oil which comprises contacting a heavy oil with a particulate mixture of a crystalline aluminosilicate-containing cracking catalyst particle and an alumina particle and/or a phosphorus-containing alumina particle mixed in the weight ratio of 80/20-20/80, under cracking conditions, metal contaminants contained in said feed oil are captured preferentially by said alumina particle and/or a phosporous-containing alumina particle, and the coexistent cracking catalyst is poisoned only to a reduced degree by metal contaminants.