Patents Examined by Pane Dinh
  • System and method for controlling analysis of multiple instantiations of circuits in hierarchical VLSI circuit designs
    Patent number: 7124380
    Abstract: A method for controlling analysis by an analysis tool of multiple instantiations of a circuit in a hierarchical circuit design is described. The method comprises providing a user-selected analysis option to the analysis tool; analyzing a first instantiation of the circuit as specified by the analysis option; and responsive to the first instantiation of the circuit passing the analysis, terminating analysis of the circuit.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: October 17, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: S. Brandon Keller, Gregory Dennis Rogers, George Harold Robbert