Abstract: If the size of a single crystal silicon layer attached is not appropriate, even when a large glass substrate is used, the number of panels to be obtained cannot be maximized. Therefore, in the present invention, a substantially quadrangular single crystal semiconductor substrate is formed from a substantially circular single crystal semiconductor wafer, and a damaged layer is formed by irradiation with an ion beam into the single crystal semiconductor substrate. A plurality of the single crystal semiconductor substrates are arranged so as to be separated from each other over one surface of a supporting substrate. By thermal treatment, a crack is generated in the damaged layer and the single crystal semiconductor substrate is separated while a single semiconductor layer is left over the supporting substrate. After that, one or a plurality of display panels is manufactured from the single crystal semiconductor layer bonded to the supporting substrate.

Abstract: A drive cone 11 and a diaphragm 14 are integrally driven by a voice coil 6 movably disposed in a magnetic gap 5. Peripheral edge portions of the drive cone 11 and the diaphragm 14 are supported by a frame 12 via different edge portions 13 and 15, respectively. The drive cone 11 is provided with a rising-up portion 11a which rises up toward an acoustic radiation direction from a inner circumferential end, and a rising-down portion 11b which rises down toward a direction reverse to the acoustic radiation direction. An inner circumferential edge of the diaphragm 14 is fixed at an annular top formed between the rising-up portion and the rising-down portion. Moreover, a first rib 11c and a second rib 11d are formed on the drive cone 11 in such a manner as to rise up toward the acoustic radiation direction integrally with the drive cone. The diaphragm 14 is supported also at the tips of the ribs.

Abstract: A semiconductor device includes a semiconductor element provided over a wiring board; sealing resin configured to seal the semiconductor element; and reinforcing resin provided at least at a part of a boundary part of the sealing resin and the wiring board. In the above-mentioned semiconductor device, the reinforcing resin may be provided along a perimeter of the boundary part of the sealing resin and the wiring board. The reinforcing resin may be provided at a boundary part of the sealing resin and the wiring board in a vicinity of a corner part of the sealing resin.

Abstract: A memory circuit arrangement and fabrication method thereof are presented in which the parts of the memory circuit arrangement are situated on two different substrates. An integrated memory cell array is situated on one substrate. An integrated control circuit that controls access to the memory cells is situated on the other (logic circuit) substrate. The control circuit controls sequences when reading, writing or erasing content of a memory cell. The logic circuit substrate also contains a CPU and encryption coprocessor. The memory circuit contains a sense amplifier, with the aid of which the memory state of a memory cell can be determined, and a decoding circuit that selects a word or bit line.

Abstract: A voice coil 6 is movably disposed in a magnetic gap 5. A drive cone (first diaphragm) 11 and a diaphragm (second diaphragm) 14 are integrally driven by the voice coil 6. Peripheral edge portion of the drive cone 11 and the diaphragm 14 are supported by a frame 12 through edge portions 13 and 15, respectively. An annular adhesive receiver 8 is disposed in a peripheral surface of a voice coil bobbin 7 around which the voice coil 6 is wound, and an inner peripheral edge 11a of the drive cone 11 is accommodated in the adhesive receiver 8. The drive cone 11, the adhesive receiver 8 and the voice coil bobbin 7 are connected to each other by an adhesive filled into the adhesive receiver 8.

Abstract: A method of protecting an electronics package is discussed along with devices formed by the method. The method involves providing at least one electronic component that requires protecting from tampering and/or reverse engineering. Further, the method includes mixing into a liquid glass material at least one of high durability micro-particles or high-durability nano-particles, to form a coating material. Further still, the method includes depositing the coating material onto the electronic component and curing the coating material deposited.

Abstract: A method for manufacturing a silicon chip package for a circuit board assembly provides a package with a silicon chip and an array of first contact pads that are provided by a first conductive material. A plurality of second contact pads are provided from a gold material having a hardness different than that of the first contact pads. The second contact pads are soldered to the first contact pads of the package. A circuit board assembly is assembled by providing a circuit board substrate with at least one socket with contact pads. The second contact pads of the package are assembled to the circuit board substrate contact pads.

Abstract: An electronics package includes a substrate and at least one electronic component coupled to the substrate. The electronics package comprises an alkali silicate coating forming a hermetic seal around at least a portion of the at least one electronic component.

Abstract: A method of manufacturing a semiconductor device, includes the steps of forming an insulating film on a semiconductor substrate having a silicide layer, forming a hole in the insulating film on the silicide layer, cleaning an inside of the hole and a surface of the silicide layer, forming a titanium layer on a bottom surface and an inner peripheral surface of the hole by a CVD method, forming a copper diffusion preventing barrier metal layer on the titanium layer in the hole, and burying a copper layer in the hole.

Abstract: A polysilicon film is formed all over a surface of a semiconductor substrate, then is subject to a CMP process through a mask pattern as a stopper. Then, a metal film is formed all over the resulting surface, and is allowed at least a part of the polysilicon film and at least a part of the metal film to react with each other to silicidize the metal. This forms the gate electrode.

Abstract: The invention relates to a process for the production of electrolyte capacitors having a low equivalent series resistance and low residual current, electrolyte capacitors produced by this process and the use of such electrolyte capacitors.

Abstract: An optoelectronic module having a carrier element, at least one semiconductor component for emitting or detecting electromagnetic radiation, said semiconductor component being applied on the carrier element and being electrically conductively connected and having a radiation coupling area, and also at least one optical device assigned to the semiconductor component. A connecting layer made of a radiation-transmissive, deformable material is arranged between the radiation coupling area and the optical device, the optical device and the semiconductor component being fixed relative to one another in such a way that they are pressed against one another and that the connecting layer is thereby squeezed in such a way that it generates a force that strives to press the optical device and the radiation coupling area apart.

Abstract: A bump structure with an annular support suitable for being disposed on a substrate is provided. The substrate has at least one pad and a passivation layer that has at least one opening exposing a portion of the pad. The bump structure with the annular support includes an under ball metal (UBM) layer, a bump, and an annular support. The UBM layer is disposed on the passivation layer and covers the pad exposed by the passivation layer. The bump is disposed on the UBM layer over the pad, and a diameter of a lower surface of the bump is less than the diameter of an upper surface thereof. The annular support surrounds and contacts the bump, and a material of the annular support is photoresist. An under cut effect is not apt to happen on the bump structure.

Abstract: A method and system for non-invasive sensing and monitoring of a processing system employed in semiconductor manufacturing. The method allows for detecting and diagnosing drift and failures in the processing system and taking the appropriate correcting measures. The method includes positioning at least one non-invasive sensor on an outer surface of a system component of the processing system, where the at least one invasive sensor forms a wireless sensor network, acquiring a sensor signal from the at least one non-invasive sensor, where the sensor signal tracks a gradual or abrupt change in a processing state of the system component during flow of a process gas in contact with the system component, and extracting the sensor signal from the wireless sensor network to store and process the sensor signal. In one embodiment, the non-invasive sensor can be an accelerometer sensor and the wireless sensor network can be motes-based.

Abstract: Systems and methods process structures on or within a semiconductor substrate using a series of laser pulses. In one embodiment, a deflector is configured to selectively deflect the laser pulses within a processing window. The processing window is scanned over the semiconductor substrate such that a plurality of laterally spaced rows of structures simultaneously pass through the processing window. As the processing window is scanned, the deflector selectively deflects the series of laser pulses among the laterally spaced rows within the processing window. Thus, multiple rows of structures may be processed in a single scan.

Abstract: Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system includes positioning a preformed redistribution layer as a unit proximate to and spaced apart from a microfeature workpiece having an operable microfeature device. The method can further include attaching the redistribution layer to the microfeature workpiece and electrically coupling the redistribution layer to the operable microfeature device.

Abstract: A method and system for forming dual damascene structures in a semiconductor package. In one embodiment, the method includes forming an intermediate dielectric layer on a bottom stop layer; forming an ashing removable dielectric layer on the intermediate dielectric layer; forming a patterned photoresist layer above the ashing removable dielectric layer in the semiconductor structure; and defining an in-situ hard mask in the ashing removable dielectric layer having an opening with a profile selected from the group consisting of a via, a trench, or a combination thereof. The profile of the in-situ mask preferably is capable of being transferred to the intermediate dielectric layer by etching.

Abstract: A three mask process for forming an LCD substrate includes, depositing in sequence on a base substrate a gate metallic layer, a gate insulation layer and a channel layer. A first photoresist pattern is used to form a gate electrode of a switching device, a channel pattern and a gate line on the gate electrode. A transparent conductive layer and a source metallic layer are deposited in sequence on the base substrate having the channel pattern. A source electrode and a drain electrode of the switching device, a pixel electrode and a source line electronically connected to the drain electrode, are formed by a second photoresist pattern. A first protective insulation layer is formed, and the first protective insulation layer on the pixel electrode is removed by a third photoresist pattern. Therefore, by the three masks process yields a simplified manufacturing process in which the lower portion of the source metallic pattern is not formed and display quality is improved.

Abstract: A method of forming a dual damascene structure is disclosed. A lower dielectric hardmask layer and an upper dielectric hardmask layer are deposited on an ultra low-k film. A first via is formed in the upper hardmask layer. Next, a first trench is formed using a tri-layer resist scheme. Finally, a full via and a full trench are formed simultaneously. An optional etch-stop layer can be used in the ultra low-k layer to control trench depth.

Abstract: A photoelectric conversion device comprising a photoelectric conversion part including a first electrode, a second electrode opposing to the first electrode and a photoelectric conversion layer provided between the first electrode and the second electrode, wherein a smoothing layer for reducing roughness of a surface of the photoelectric conversion layer is provided between the first electrode or the second electrode and the photoelectric conversion layer.