Abstract: A spark timing control device for an internal combustion engine includes a memory storing plural signals representing first and second sets of time durations beginning with reference positions and extending to sparking as a function of engine speed and load. In response to the engine speed being less than and greater than a predetermined value, first and second sets of spark time durations are read from the memory. First and second clock pulse generators derive first and second clock pulse signals; the period of the second pulse signal being less than that of the first signal. One of the first and second clock pulse signals is selected in response to the engine speed being respectively less than and greater than the predetermined value. Clock pulses of the selected clock pulse signal are counted. When the number of counted clock pulses equals the value representing the determined time duration a spark signal is generated.