Patents Examined by Patrick W Borges
  • Patent number: 10126958
    Abstract: Techniques are disclosed for write suppression to improve endurance rating of non-volatile memories, such as QLC-NAND SSDs or other relatively slow, low endurance non-volatile memories. In an embodiment, an SSD is configured with a fast frontend non-volatile memory, a relatively slow lower endurance backend non-volatile memory, and a frontend manager that selectively transfers data from the fast memory to the slow memory based on transfer criteria. In operation, write data from the host is initially written to the fast memory by the frontend manager. The data is moved from the fast memory to the slow memory in bands. For each data band stored in the fast memory, the frontend manager tracks invalid data counts and data age. Only bands that still remain valid are transferred to the slow memory. After a given band has been fully transferred, it is erased and re-usable for other incoming writes by the frontend manager.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: November 13, 2018
    Assignee: INTEL CORPORATION
    Inventor: Anand S. Ramalingam
  • Patent number: 10102884
    Abstract: Embodiments disclosed herein generally relate to techniques for routing data through one or more cascaded memory modules. Each memory module can include a plurality of data buffers. Each data buffer includes a plurality of ports for routing data to and/or from other memory modules. In one embodiment, the data buffer is configured to route write data to DRAM devices on a first memory module or route write data to a data buffer of at least one downstream memory module. The data buffer is also configured to receive read data from a DRAM device of the first memory module or receive read data from a downstream memory module.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: October 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Paul W. Coteus, Daniel M. Dreps, Charles A. Kilmer, Kyu-hyoun Kim, Warren E. Maule, Todd E. Takken
  • Patent number: 10078452
    Abstract: Provided is a performance information management system which includes a target apparatus having a plurality of components as monitoring targets and a management computer for managing the target apparatus and which manages performance information of the target apparatus with the management computer, wherein the target apparatus is capable of acquiring performance information for each monitoring target, and the management computer is configured to: allocate an initial storage area of which capacity differs for each monitoring target to each of the monitoring targets; detect depletion of a storage area allocated to a monitoring target when attempting to store the performance information of the monitoring target to the storage area; additionally allocate a consecutive storage area with a prescribed capacity to the monitoring target with the depleted storage area; and store the performance information of the monitoring target in the additionally-allocated storage area.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: September 18, 2018
    Assignee: HITACHI LTD.
    Inventors: Hiroshi Hayakawa, Takaki Kuroda
  • Patent number: 10073721
    Abstract: Techniques and systems are disclosed for implementing non-blocking writes to eliminate the fetch-before-write requirement by creating an in-memory patch for the updated page and unblocking the calling process. Non-blocking writes eliminate such blocking by buffering the written data elsewhere in memory and unblocking the writing process immediately. Subsequent reads to the updated page locations are also made non-blocking and, in some cases, can be eliminated when the read request can be serviced from in-memory patches. Implementation scenarios can include an operating system (OS) enhancement, revision to an existing OS component (e.g., the OS kernel), special OS component, or enhancement to the software or firmware of the controller software or microcontroller of a storage device or array of storage devices.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: September 11, 2018
    Assignee: The Florida International University Board of Trustees
    Inventors: Raju Rangaswami, Daniel Campello, Luis Useche, Hector Lopez, Ricardo Koller
  • Patent number: 10019169
    Abstract: A data storage apparatus includes a storage device, a first processor storing first data at a first address region of the storage device in the first memory, the first data included in a first data writing request, and a second processor coupled to a second memory storing second data at a second address region of the storage device in the second memory, the second data included in a second data writing request, and transmit the second data at the second address region of the storage device to the first processor, wherein the first processor is configured to store a first reception number in the first memory, the first reception number indicating a reception order, store the second data at the second address region of the storage device in the first memory, store a second reception number in the first memory, the second reception number indicating a reception order.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: July 10, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Jun Kato
  • Patent number: 9952940
    Abstract: Operating a shared nothing cluster system (SNCS) in order to perform a backup of a data element. The SNCS includes at least a first and a second storage node connected via a first network of the SNCS. The first and second storage nodes are configured to store a first set and a second set of blocks, respectively, in which the first and second set of blocks form a single data element. A backup server is connected to the first and second storage nodes, and the backup server includes a backup information table. The first and second storage nodes are configured to act as backup clients in a client-server configuration involving the backup server, upon receiving at the first and the second storage nodes a request to backup the data element. For each node of the first and second storage nodes, the node identifies one or more block sequences of consecutive blocks in a set of blocks of the data element stored in the node.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Christian Bolik, Nils Haustein, Dominic Mueller-Wicke, Thomas Schreiber