Patents Examined by Patti Lin
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Patent number: 7915170Abstract: By providing a protection layer at the bevel region, the deposition of polymer materials during the patterning process of complex metallization structures may be reduced. Additionally or alternatively, a surface topography may be provided, for instance in the form of respective recesses, in order to enhance the degree of adhesion of any materials deposited in the bevel region during the manufacturing of complex metallization structures. Advantageously, the provision of the protection layer providing the reduced polymer deposition may be combined with the modified surface topography.Type: GrantFiled: January 22, 2007Date of Patent: March 29, 2011Assignee: Advanced Micro Devices, Inc.Inventors: Su Ruo Qing, Frank Feustel, Carsten Peters
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Patent number: 7906030Abstract: A WC substrate 7 is etched by using plasma 50 generated from a mixed gas of a gas including a halogen atom and a gas including a nitrogen atom.Type: GrantFiled: May 23, 2006Date of Patent: March 15, 2011Assignee: Panasonic CorporationInventors: Hideo Nakagawa, Masaru Sasago, Tomoyasu Murakami
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Patent number: 7892441Abstract: A method of manufacturing an interposer is provided, including the steps of providing a sheet with a copper layer and polyimide layer, laser drilling holes in the polyimide layer down to the copper layer, filling the holes with copper and extending the copper above the polyimide layer to define caps, removing portions of the copper layer to form conductive pads, and filling gaps between the conductive pads with an insulator, wherein individual conductive pads are in electrical contact with corresponding individual caps.Type: GrantFiled: June 1, 2007Date of Patent: February 22, 2011Assignee: General Dynamics Advanced Information Systems, Inc.Inventor: Deepak K. Pai
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Patent number: 7883634Abstract: An elevator load bearing member assembly includes at least one traction enhancing surface (46) on a jacket (44). In one example, a mechanical removal process is used to strip away at least some of an amide-rich layer from the surface (46) after the jacket has been extruded onto tension members (42). In another example, a chemical removal process is used. Another disclosed example includes disrupting the surface.Type: GrantFiled: February 9, 2005Date of Patent: February 8, 2011Assignee: Otis Elevator CompanyInventors: Mark S. Thompson, John P. Wesson, William A. Veronesi, Hugh J. O'Donnell, John Pitts, William C. Perron, Ary O. Mello, Kathryn Rauss
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Patent number: 7883629Abstract: During the patterning of stressed layers having different types of intrinsic stress, the effects of the deposition of a silicon dioxide based etch indicator material between the first and second dielectric layers may be significantly reduced by a controlled etch on the basis of optical measurement data indicating the etch rate and, thus, the performance of the respective etch process. In other cases, highly efficient etch indicator species may be incorporated into the stressed dielectric layers or may be formed on a surface portion thereof with reduced layer thickness, thereby providing an enhanced endpoint detection signal without creating the negative effects of silicon dioxide based indicator layers. In one illustrative embodiment, a stressed silicon, nitrogen and carbon-containing layer may be combined with a stressed silicon and nitrogen-containing layer, wherein the carbon species provides a prominent endpoint detection signal.Type: GrantFiled: October 8, 2007Date of Patent: February 8, 2011Assignee: GLOBALFOUNDRIES Inc.Inventors: Matthias Schaller, Heike Salz, Ralf Richter, Sylvio Mattick
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Patent number: 7879732Abstract: A method for etching a thin film and fabricating a semiconductor device includes etching the thin film on a substrate, while monitoring the removal of an endpoint detection layer remotely located from the substrate, such that precise control of the thin film etching is provided by monitoring the removal of the endpoint detection layer. The endpoint detection layer is formed on a surface of an etching apparatus that is exposed to the same etching conditions as the thin film to be etched. The etching of the thin film is stopped when a predetermined amount of the endpoint detection layer has removed from the surface of the etching apparatus.Type: GrantFiled: December 18, 2007Date of Patent: February 1, 2011Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Xiang Hu, Hai Cong, Pradeep Yelehanka, Mei Sheng Zhou
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Patent number: 7862735Abstract: A method of forming a relatively fine contact hole using two masks. The two masks may have only their edge portions open, which may overlap each other.Type: GrantFiled: May 23, 2007Date of Patent: January 4, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Haeng Leem Jeon
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Patent number: 7858530Abstract: A processing method for a wafer includes: preparing a wafer which has a device region having plural devices formed on a surface of the wafer; and a peripheral reinforcing portion which is integrally formed around the device region and has a projection projecting outwardly on a rear surface of the wafer. The processing method further includes: removing at least the projection of the peripheral reinforcing portion of the wafer; and transferring the wafer after the removing. In the removing, while the wafer is held on a holding table such that the rear surface of the wafer is exposed and the surface of the wafer closely contacts the holding table, at least the projection of the peripheral reinforcing portion is removed. After the removing of at least the projection, while the wafer is held on the holding table, a holding tape is applied to the rear surface of the wafer and the holding tape is supported by a frame.Type: GrantFiled: March 27, 2007Date of Patent: December 28, 2010Assignee: Disco CorporationInventors: Keiichi Kajiyama, Takatoshi Masuda
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Patent number: 7858526Abstract: By performing an anisotropic resist modification prior to the actual resist trimming process, the profile of the end portions of the resist features may be significantly enhanced, for instance by providing substantially vertical sidewall portions. Consequently, an overlap of gate electrodes with the respective isolation structures may be obtained, while nevertheless the probability for a short circuit between opposing end portions of the gate electrodes may be significantly reduced, thereby providing the potential for further scaling down device dimensions.Type: GrantFiled: February 7, 2007Date of Patent: December 28, 2010Assignee: Advanced Micro Devices, Inc.Inventors: Roland Stejskal, Stephan Kruegel, Markus Lenski
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Patent number: 7857983Abstract: To provide a method for manufacturing a piezoelectric resonator which can widen the range of frequency adjustment while saving metal thereby suppressing reduction of the yields when forming a metal film for frequency adjustment at the tip of an vibrating arm. The method of manufacturing the piezoelectric resonator according to the present invention includes the steps of: bringing a substrate in which an outside shape of a piezoelectric oscillating piece is formed, into contact with an etching solution; forming grooves in a plurality of vibrating arms using a mask having an aperture at the portion corresponding to the groove, and having a metal film formed on the whole surface except the aperture; and thereafter, forming a resist mask on the surface of the substrate so that resist is left at the tip of the vibrating arms which will be a formation area of a metal film for frequency adjustment so as to remove the metal film by etching.Type: GrantFiled: July 24, 2007Date of Patent: December 28, 2010Assignee: Nihon Dempa Kogyo Co., Ltd.Inventor: Keisuke Hirano
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Patent number: 7842189Abstract: A processing apparatus includes counters each used to measure the length of RF discharge time over which power is applied to a consumable component in correspondence to a specific type of processing executed in a processing chamber, a storage to store wear coefficient information indicating wear coefficients each corresponding to one of the plurality of types of processing, and a control unit that obtains information indicating RF discharge time lengths measured by the counters in correspondence to the individual types of processing, obtains the wear coefficients corresponding to the individual types of processing indicated in the wear coefficient information stored in the storage, calculates a wear index value for the consumable component based upon the RF discharge time lengths and the wear coefficients corresponding to the individual types of processing, and executes consumable component management processing based upon the calculated wear index value.Type: GrantFiled: January 19, 2006Date of Patent: November 30, 2010Assignee: Tokyo Electron LimitedInventor: Ryotaro Midorikawa
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Patent number: 7833426Abstract: The described embodiments relate to features in substrates and methods of forming same. One exemplary embodiment can be a microdevice that includes a substrate extending between a first substrate surface and a generally opposing second substrate surface, and at least one feature formed into the first surface along a bore axis that is not transverse to the first surface.Type: GrantFiled: May 11, 2007Date of Patent: November 16, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Leo C. Clarke, Chris Aschoff, Cary G. Addington
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Patent number: 7828986Abstract: A method. A combination is provided of a block copolymer and additional material. The copolymer includes a first block of a first polymer covalently bonded to a second block of a second polymer. The additional material is miscible with the first polymer. The first polymer includes polystyrene and the second polymer includes poly(ethylene oxide). A first layer including polydimethylglutarimide is adhered onto a surface of a substrate including a dielectric coated silicon wafer. A film is formed of the combination directly onto a surface of the first layer. Nanostructures of the additional material self-assemble within the first polymer block. The film and the first layer are simultaneously etched. The nanostructures have an etch rate lower than an etch rate of the block copolymer and lower than an etch rate of the first layer. Portions of the film are removed. Features remain on the surface of the first layer.Type: GrantFiled: October 29, 2007Date of Patent: November 9, 2010Assignee: International Business Machines CorporationInventors: Joy Cheng, Mark W. Hart, Hiroshi Ito, Ho-Cheol Kim, Robert Miller
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Patent number: 7828985Abstract: A method of producing a thin film magnetic head includes the steps of: forming a second lower magnetic pole layer in a part on a first lower magnetic pole layer; forming, over the entire wafer surface, an insulating layer so as to be thicker than the thickness of the second lower magnetic pole layer in the stacking direction, the insulating layer being less likely to be etched than the second lower magnetic pole layer; carrying out a planarizing process by CMP on the entire wafer surface until the second lower magnetic pole layer is exposed; forming a concave portion including the second lower magnetic pole layer and the insulating layer by ion beam etching on the entire wafer surface; forming a recording gap layer over the entire wafer surface; and forming a first upper magnetic pole layer in the upper magnetic pole layer so as to fill the concave portion.Type: GrantFiled: August 27, 2007Date of Patent: November 9, 2010Assignee: TDK CorporationInventors: Yuji Ito, Hiraku Hirabayashi, Yoshiyuki Mizoguchi, Nobuya Oyama
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Patent number: 7824563Abstract: The present invention relates to a novel etching medium for the structuring of transparent, conductive layers, as are used, for example, in the production of liquid-crystal displays (LCDS) using flat-panel screens or of organic light-emitting displays (OLEDs) or in thin-film solar cells. Specifically, it relates to particle-free compositions by means of which fine structures can be etched selectively in oxidic, transparent and conductive layers without damaging or attacking adjacent areas. The novel liquid etching medium can advantageously be applied by means of printing processes to the oxidic, transparent, conductive layers to be structured. Subsequent heat treatment accelerates or initiates the etching process.Type: GrantFiled: July 3, 2006Date of Patent: November 2, 2010Assignee: Merck Patent GmbHInventors: Werner Stockum, Armin Kuebelbeck
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Patent number: 7780863Abstract: A waveguide has a hollow center. The waveguide has dielectric tubes which have a geometric arrangement, like a triangle-lattice arrangement. A laser transmitted in the waveguide is confined and is emitted out with a narrow expending angle. Hence, the laser is emitted straightly forwarded and has a low power loss. The present invention is suitable for using in a high-power laser and obtaining a directive microwave.Type: GrantFiled: June 6, 2007Date of Patent: August 24, 2010Assignee: National Central UniversityInventors: Chii-Chang Chen, Ya-Lun Tsai, Ching-Yi Chen, Jenq-Yang Chang
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Patent number: 7767107Abstract: A process for producing an aluminum electrode foil for a capacitor, which includes a first step of preparing an emulsion from a mixture including a first phase of a liquid resin or a resin solution obtained by dissolving a resin in a solvent, a second phase of a liquid that is incompatible with the first phase, and an emulsifier; a second step of coating the emulsion on a surface of an aluminum foil; a third step of removing the second phase to form a resin film having a plurality of pores on its surface; a fourth step of etching the aluminum foil having the resin film formed thereon; and a fifth step of removing the resin film after etching. The production process can form high-density etching pits with high accuracy.Type: GrantFiled: August 1, 2005Date of Patent: August 3, 2010Assignee: Panasonic CorporationInventors: Ayumi Kochi, Yuji Midou, Yukihiro Shimasaki, Hiroshi Fujii, Tatsuji Aoyama