Patents Examined by Peter M Novak
  • Patent number: 11916477
    Abstract: A voltage conversion circuit and a non-isolated power supply system are provided. The voltage conversion circuit includes: a switching power supply chip which includes a power MOS transistor and a driving circuit, where the driving circuit is adapted to drive the power MOS transistor; and a driving circuit power supply unit which includes a boost unit, wherein when an output voltage of the boost unit is less than a working voltage of the driving circuit, an internal power supply of the switching power supply chip provides the working voltage for the driving circuit; and when the output voltage of the boost unit reaches the working voltage of the driving circuit, the output voltage of the boost unit provides the working voltage for the driving circuit.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: February 27, 2024
    Assignee: Wuxi Chipown Microelectronics Co., Ltd.
    Inventors: Haisong Li, Fan Yang, Binsong Tang, Yifan Xiao, Yangbo Yi
  • Patent number: 11916495
    Abstract: A device is configured to detect a zero voltage switching (ZVS) circuit output that includes a hard switching signal. The hard switching signal includes a false signal and a spike signal. Thereafter, the device generates digital pulse signals that correspond to the false signal and the spike signal. Accordingly, the device filters the generated digital pulse signal that corresponds to the false signal, and uses the digital pulse signal that corresponds to the spike signal for adjusting a timing of a pulse width modulation (PWM) switching cycle.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 27, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Hrishikesh Ratnakar Nene, Salil Chellappan, Zhong Ye
  • Patent number: 11909301
    Abstract: The present disclose relates to an intermittent power saving mode control circuit and method thereof, comprising: a mode indication signal generating circuit configured to generate a mode indication signal according to an output voltage compensation signal, a first reference voltage, and a second reference voltage, the mode indication signal is configured to indicate that a switching power supply is working in a work mode or a sleep mode; wherein the second reference voltage is adjusted according to a frequency of the mode indication signal, so that the frequency of the mode indication signal is maintained within a predetermined range.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 20, 2024
    Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) CO., LTD.
    Inventors: Zhan Chen, Qiukai Huang
  • Patent number: 11901808
    Abstract: A method for protecting a circuit includes steps of: providing a first current source connected to a capacitor of the circuit through a second switch; providing a detection and control unit for turning on the second switch at a first time, and let the first current source to charge the capacitor; detecting a voltage value of the capacitor by the detection and control unit; wherein when the voltage value is greater than or equal to a reference voltage value, the detection and control unit turns off the second switch and turns on a first switch of the circuit, and when the voltage value is lower than the reference voltage value, the detection and control unit turns off the second switch and continue turns off the first switch.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: February 13, 2024
    Assignee: INNOLUX CORPORATION
    Inventor: Ching-Wen Shih
  • Patent number: 11894780
    Abstract: A power conversion unit includes a plurality of semiconductor modules, a gate drive circuit, a first substrate having a flat plate shape, and a second substrate having a flat plate shape. The first substrate has a first surface facing a bottom plate of a casing accommodating the semiconductor modules and the gate drive circuit, and a second surface on an opposite side to the first surface. The second substrate is arranged above the first substrate in parallel with the second surface. The semiconductor modules are mounted on the first surface. The gate drive circuit is formed on a surface of the second substrate on a side that does not face the second surface. The power conversion unit further includes a connector provided on the second surface and connected to a surface on a side facing the second substrate.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: February 6, 2024
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Koki Nakamura, Toshiki Nakamori
  • Patent number: 11881702
    Abstract: A switching module includes a determiner to open a first bidirectional switch and close a second bidirectional switch from a first time point over a testing period to determine that the first bidirectional switch has a short circuit failure when a differential absolute value of voltage values detected by voltmeters is equal to a preset voltage threshold value or less, and to open the first bidirectional switch and close the second bidirectional switch from a second time point after a period of n+½ times, where n is a positive integer, the set cycle from the first time point elapses, over a testing period to determine that the first bidirectional switch has a short circuit failure when a differential absolute value of the voltage values detected by the voltmeters is equal to the voltage threshold value or less.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideaki Nomura, Michiya Mori
  • Patent number: 11881778
    Abstract: A circuit portion comprises a DCDC converter that is configured to charge and discharge an inductor according to a duty cycle to provide current to an output load. A duty module is configured to determine the duty cycle such that the DCDC converter will output a target current. A duty limiter module is configured to cause the inductor to discharge early if the determined duty cycle exceeds a threshold.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: January 23, 2024
    Assignee: Nordic Semiconductor ASA
    Inventor: Samuli Hallikainen
  • Patent number: 11876436
    Abstract: A method includes detecting a first current flowing through a first clamping device coupled to a gate of a power switch, determining whether an inductor current reduces to zero based upon a first comparison between the first current and a first predetermined current level, and after determining the inductor current reduces to zero, determining whether a drain voltage of the power switch enters a valley of a resonant ringing based upon a second comparison between the first current and the first predetermined current level.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: January 16, 2024
    Assignee: Halo Microelectronic International
    Inventor: Milind Chandra Gupta
  • Patent number: 11876454
    Abstract: A power supply circuit has a push-pull portion having a transformer; first and second terminals of the primary winding, each connected to ground via first and second switches; an inductor connected between an input voltage and the primary winding centre tap via a third switch; an energy storage portion connected between the primary winding and ground, and to the inductor via a fourth switch; a controller arranged to monitor the input voltage and to apply partially overlapping first and second PWM signals to the first and second switches; when input voltage is between first and second thresholds, the controller closes the third switch and opens the fourth switch; above the second threshold, the controller applies a third PWM signal to the third switch and opens the fourth switch; and below the first threshold, the controller closes the third switch and applies a fourth PWM signal to the fourth switch.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: January 16, 2024
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventor: Andrew Fitzroy McLean
  • Patent number: 11876452
    Abstract: A DC-DC converter including a switching buck regulator including a first power switch connected to a first power node, a second power switch connected to a second power node, a driver configured to drive the first and second power switches, an output filtering inductor connected to a node between the first and second power switches, and an output filtering capacitor connected to the output filtering inductor, a controller configured to compensate for an output signal of the switching buck regulator in a time domain using a reference voltage, and a feed forward circuit connected between the switching buck regulator and the controller, and including a first buffer, a second buffer, an RC filter, and an adder may be provided. Accordingly, the DC-DC converter can reduce a delay of a compensation circuit, improve transient response characteristics of the switching buck regulator, and further improve the performance of the DC-DC converter.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: January 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeongpyo Park, Taehwang Kong, Junhyeok Yang, Donghoon Jung
  • Patent number: 11876456
    Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 16, 2024
    Assignee: Alpha and Omega Semiconductor International LP
    Inventors: Nicholas I. Archibald, Steven P. Laur, Rhys S. A. Philbrick
  • Patent number: 11870358
    Abstract: A system and method of fault detection based on a detailed waveform analysis is presented for transient and steady-state fault operation of 3-? DAB converter. Main symptoms of the converter during normal and fault conditions have been identified and a unique pattern in DC bias of phase currents under fault mode is noted. The logic-based fault diagnosis scheme is used to detect the fault and identify the faulty transistor.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: January 9, 2024
    Assignee: Deere & Company
    Inventors: Sagar K Rastogi, Brij N. Singh
  • Patent number: 11863055
    Abstract: Circuits and methods encompassing a power converter that can be started and operated in a reversed unidirectional manner or in a bidirectional manner while providing sufficient voltage for an associated auxiliary circuit and start-up without added external circuitry for a voltage booster and/or a pre-charge circuit—that is, with zero external components or a reduced number of external components. Embodiments include an auxiliary circuit configured to selectively couple the greater of a first or a second voltage from a power converter to provide power to the auxiliary circuit. Embodiments include an auxiliary circuit configured to select a subcircuit coupled to the greater of a first or a second voltage from a power converter to provide an output for the auxiliary circuit. Embodiments include a charge pump including a gate driver configured to be selectively coupled to one of a first voltage node or second voltage node of the charge pump.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: January 2, 2024
    Assignee: pSemi Corporation
    Inventor: Aichen Low
  • Patent number: 11863064
    Abstract: According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: January 2, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michele Sblano, Saverio De Palma, Massimiliano Picca, Stefano Casula
  • Patent number: 11855537
    Abstract: A switching converter with adaptive constant on-time control has a power switch and a control circuit. The switching converter converts an input voltage into an output voltage. When the switching converter is in a light-load state, the on-time of the power switch is controlled to be smaller than the on-time of the power switch in a normal-load state, wherein the normal-load state includes a continuous current mode (CCM) or a discontinuous current mode (DCM).
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: December 26, 2023
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventors: Jian Zhang, Xingwei Wang
  • Patent number: 11855538
    Abstract: A control circuit includes a timeout circuit configured to receive a first control signal. The timeout circuit asserts a timeout output signal on a timeout circuit output responsive to an expiration of a time period following assertion of the first control signal. A counter circuit has an input coupled to the timeout circuit output and has a counter circuit output. Responsive to assertion of the first control signal, the counter circuit selectively increments an output count value on the counter circuit output responsive to the timeout output signal having a first logic state or decrements the output count value on the counter circuit output responsive to the timeout output signal having a second logic state. A comparator circuit has a control input coupled to the counter circuit output. The comparator circuit adjusts a magnitude of a reference signal responsive to the output count value from the counter circuit.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: December 26, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Liang Zhang
  • Patent number: 11855531
    Abstract: A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capac
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: December 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventor: Changjong Lim
  • Patent number: 11848600
    Abstract: A three-phase multilevel inverter is connected to a first direct-current voltage source having a first voltage. Single-phase inverters are each connected in series to a corresponding phase of the three-phase multilevel inverter, and include a second direct-current voltage source, respectively, each having a second voltage. Combined output voltages, which are combinations of boost voltages generated by the three single-phase inverters and output voltages of the three-phase multilevel inverter, are supplied to a load. The control device adjusts a common mode voltage of the combined output voltages to be within a predetermined allowable range, and variation ranges of the line voltages in the combined output voltages to satisfy a specified condition established with the second voltage as a reference.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: December 19, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masahiro Sugahara, Kenji Fujiwara, Akihiko Iwata, Hisatoshi Fukumoto
  • Patent number: 11848619
    Abstract: Apparatus and methods for supplying DC power to control circuitry of a matrix converter is provided. In certain embodiments, a matrix converter includes an array of switches having AC inputs for receiving a multi-phase AC input voltage and AC outputs for providing a multi-phase AC output voltage to a load, such as an electric motor. The matrix converter further includes control circuitry for opening or closing individual switches of the array, and a clamp circuit connected between the AC inputs and AC outputs of the array and operable to dissipate energy of the load in response to an overvoltage condition, such as an overvoltage condition arising during shutdown. The clamp circuit includes a switched mode power supply operable to generate a DC supply voltage for the control circuitry.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: December 19, 2023
    Assignee: ITT Manufacturing Enterprises LLC
    Inventor: Dean P. Williams
  • Patent number: 11831148
    Abstract: A method for operating an electronic switch is described hereinafter. According to one exemplary embodiment, the method (for an electronic switch in the switched on state) comprises detecting whether there is an undervoltage condition at a supply voltage node and providing an undervoltage signal which indicates an undervoltage condition. The method further comprises switching off the electronic switch if the undervoltage signal indicates an undervoltage condition and switching (back) on the electronic switch if the undervoltage signal no longer indicates an undervoltage condition. If the undervoltage signal indicates an undervoltage condition during a switch-on process of the electronic switch, the electronic switch is switched off again and switching back on is prevented for a defined period of time, irrespective of the undervoltage signal. Moreover, a corresponding circuit is described.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: November 28, 2023
    Assignee: Infineon Technologies AG
    Inventor: Michael Asam