Abstract: A switching power source apparatus reduces power loss and improves conversion efficiency of a switching power source part by rectifying and smoothing a commercially available alternating power source supplied to an oscillation drive circuit and a switching circuit part that constitutes a half-bridge circuit. An output of the half-bridge circuit is grounded via a resonance capacitor, a choke coil, and a primary winding of an insulated type converter transformer. This converter transformer has a secondary winding for obtaining a +B voltage and high-voltage windings for obtaining a high-level output voltage. Further, fluctuation in the voltage of the high-level output voltage is supplied to the oscillation drive circuit via resistors, a control circuit, and a photo-coupler, whereby the switching circuit part is controlled.

Abstract: A conversion apparatus having transistors, comprising means for inverting a DC voltage in order to obtain an AC voltage, means for filtering the AC voltage, including at least one parallel inductor Lp, the device being capable of operating above a resonant frequency Fp. The conversion apparatus comprises means for predicting a zero crossing of the instantaneous current I1p in the parallel inductor Lp, and means for causing a transistor of the device to switch if a zero crossing of the current I1p is predicted.

Abstract: A power source device includes a control circuit which controls switching elements in full-bridge arrangement so as, in decreasing an output to a load, to substantially equalize ON timing of one of two switching elements at diagonal position to the other of them with ON period of the one switching element shortened, that is, with ON duty ratio of the one switching element decreased. Switching operation of the elements in this event is not made to be in the hard switching operation, and a range in which the output to load can be controlled without increasing any stress or noise is thereby broadened, whereby it is enabled to minimize varying width of switching frequency and to attain a wide range control of the output to load without causing any one of the switching elements to be in the hard switching operation.

Abstract: In a rectifier circuit that rectifies an alternating current voltage generated by a generator and supplies the alternating current voltage to a capacitor as a power storage unit, a plurality of level shifters supplies a voltage level-shifted by an offset voltage to respective comparators when the comparators corresponding to transistors perform an on-and-off control, based on voltages across terminals of each of a plurality of transistors forming the rectifier circuit. The offset voltage is set accounting for a response delay time of each comparator. Each transistor is reliably turned off at the time the transistor should be turned off in relation to the voltage across the output terminals of the generator. As a result, a reverse current from the capacitor is thus prevented. A delay in the timing of turning off each transistor is eliminated.

Abstract: The invention is related to method(s) and system for ensuring lifetime of recharged battery built-in portable electronic device. The method comprises: receive a predetermined range of electricity power; perform an electricity power testing process to measure an actual account of electricity power of a recharged battery that built-in a portable electronic device; and perform an electricity power adjusting process to let the actual account is modified into the predetermined range whenever the actual account is out the predetermined range.

Abstract: A DC-DC converter having a transformer, a reactance coil and a controllable switch for turning a DC supply voltage on and off. The contact gap of a switching transistor is set at a reference potential at a connecting tap between a primary winding and a secondary winding of the reactance coil, which is connected like a transformer with a certain transformation ratio. The anode-cathode segment of a diode and an output capacitor are set at reference potentials in series with the secondary winding of the reactance coil, with the output voltage for a load being applied across the output capacitor. The DC supply voltage is supplied to the primary winding of the reactance coil over an inductance arrangement, and a capacitance arrangement is arranged in parallel with the contact gap of the switching transistor so that a series resonant circuit, which is operative in the turn-on and turn-off phases of the switching transistor, is provided by the inductance arrangement and the capacitance arrangement.

Abstract: The present invention relates to a charging device for storing electric energy in a plurality of electrical double layer capacitors, comprising a power source circuit, a capacitor bank having a plurality of capacitors, a control circuit for switching an interconnection state of the plurality of capacitors, and a voltage monitor circuit for monitoring a charged voltage in the plurality of capacitors, which repetitively carries out a step of performing a charging operation by switching the plurality of capacitors in the capacitor bank to a serial connection state, and a step of monitoring a charged voltage by using a voltage monitor circuit by switching the plurality of capacitors to a parallel connection state until the charged voltage reaches a predetermined value.

Abstract: A system and method for maintaining a balanced current level among multiple power supply modules within a parallel power supply. An external voltage is applied to an internal reference translator circuit within each of the parallel power supply modules, such that an internal current-sharing voltage reference is generated within each power supply module. An external reference translator circuit is biased by an independent voltage level, such that the external reference translator circuit generates an external current-sharing voltage reference that is maintained at a higher voltage level than the internal current-sharing voltage references generated within the parallel power supply modules. The external current-sharing voltage reference acts as a master current share reference with respect to which each of the internal current-sharing voltage references.

Abstract: A low power consumption circuit has a circuit that cuts power to a portion of the low power consumption circuit under previously specified conditions in order to reduce consumption of power, a high impedance circuit that becomes high impedance when power to the portion of the low power consumption circuit is cut off, and a low current supply circuit supplying a low current to the high impedance circuit to prevent mistaken activation of the low power consumption circuit due to external interference.

Abstract: A voltage regulator that includes a transistor, a first amplifier and a second amplifier. The voltage regulator maintains a voltage between a first node and a second node within a predetermined range by maintaining a current level flowing from the first node to the second node. The transistor has a first pole electrically coupled to the first node, a second pole electrically coupled to the second node and a gate. The first amplifier has a first input, a second input and an output, and the second amplifier has a first input, a second input and an output, wherein the first inputs of the first and second amplifiers are electrically coupled to the first node, the second inputs of the first and second amplifiers are electrically coupled to the second node, and the outputs of the first and second amplifiers are electrically coupled to the gate of the transistor, respectively. The first and second amplifiers have different characteristic response times to reach a saturation voltage value.

Abstract: A power conversion apparatus is provided which includes a power converter including a plurality of semiconductor switching elements which operate to perform power conversion, thereby to generate polyphase alternating current, an ac load circuit connected to an ac output side of the power converter, and a zero-phase power supply device connected to the ac load circuit. In this apparatus, the power converter, ac load circuit, and the zero-phase power supply device are connected in the form of a loop, so that voltage and current of the zero-phase power supply device provide zero-phase-sequence components when viewed from the ac output side of the power converter through the ac load circuit. The power converter performs time-sharing operations to supply and receive electric power to and from the ac load circuit, and supply and receive zero-phase-sequence power to and from the zero-phase power supply device.

Abstract: A battery charger having a detachable plug has a charger body and a changeable plug provided with a first plate and second plate. The second plate has at least two conductor blades extending out therefrom. The plug is detachably connected to the charger body by the first retaining device on the first plate and the second retaining device on the second plates. Therefore, the battery charger is securely and electrically insertable in an outlet of a power supply.

Abstract: A converter circuit has a reactor connectable to an AC power supply. It further has a PWM converter circuit connected to the reactor, the PWM converter circuit including a high speed diode, a rectifier diode and a switching element connected in parallel to the rectifier diode. The converter circuit further has an input current detector for detecting an input current of the PWM converter circuit, a DC voltage level detector for detecting an output voltage of the PWM converter circuit, a voltage polarity detector connected to the AC power supply, and a control device. The control device measures a variation period of the output voltage measured by the voltage level detector to judge a power supply frequency. It then controls the PWM converter circuit based on a power supply frequency judgement result, a detection result from the voltage level detector, an input current detected by the input current detector, and an output voltage detected by the DC voltage detector.

Abstract: An output buffer device having first and second supply voltage references, the first voltage reference being lower in value than the second voltage reference. The output buffer device includes first and second complementary MOS transistors, which transistors are connected in series together between one of the supply voltage references and a further voltage reference, have gate terminals connected together and to an input terminal of this buffer device, and have drain terminals connected together and to an output terminal of the buffer device. Advantageously, the first transistor is connected to the first supply voltage reference. Furthermore, the output buffer device comprises at least one additional drive MOS transistor of the same type as the first MOS transistor and placed between the second supply voltage reference and the output terminal of the buffer device.

Abstract: A first circuit having a first coil electrically charges a second circuit having a second coil through electromagnetic coupling of the two coils. When data signals are to be transferred between the first and second circuits, signal transfer is started only after the second circuit has been charged for a predetermined period of time. The position relationship between the coils is also detected, and a charging/transfer selector changes a duty ratio between charge transfer and data transfer in accordance with the detected result. The charge is transferred in an intermittent manner, and the charging rate is adjusted according to the difference between the voltage of a secondary battery observed during a charging phase and the voltage of the secondary battery observed a certain time after interruption of the charging phase, or vice versa.

Abstract: A multi-chip semiconductor package is described. By changing the design for a lead frame, two or more chips are packaged together. A die pad whose surface area is smaller than that of a chip is used so that bonding pads can be exposed and chips can mounted with the same direction. Therefore, wires are not crossed during wire bonding. Thus, chips do not need additional treatment. Performance and density of the package can be enhanced without increasing capital expenditure. Device integration is also increased.

Abstract: The first accommodation space forming body is joined to the supporting base plate, and the second accommodation space forming body is joined to the first accommodation space forming body. Accommodation space S is formed between the accommodation space forming bodies. The positioning body is joined to the second accommodation space forming body. The accommodation space forming bodies are fixed onto the supporting base plate by screwing the screws. The profile and size of the first accommodation space forming body are the same as those of the second accommodation space forming body. The accommodation space forming bodies are joined to each other by the engagement of the engaging protrusions with the engaging recesses.

Abstract: An electric double layer capacitor apparatus including a plurality of electric double layer capacitors connected in series, at least one set of a voltage detection device and a discharge device, and a controller. The at least one set is provided to at least one of the plurality of electric double layer capacitors. The voltage detection device is configured to detect a terminal voltage of the at least one of the plurality of electric double layer capacitors. The controller is configured to stop charging the plurality of electric double layer capacitors when the terminal voltage detected by the voltage detection device reaches a maximum charge voltage.

Abstract: A method for operating a pulse width modulated switching power converter (1), and a pulse width modulated switching power converter that is constructed to operate in accordance with the method. The power converter has an input coupled to an output of a solar array (10) and an output providing an output current, the output being coupled to battery (14) for applying a charging current ICHARGE to the battery while also supplying a current ILOAD to a load. The method includes the steps of: (a) incrementally increasing (18, C1) a duty cycle of the pulse width modulated switching power converter so as to incrementally increase a magnitude of the output current of the switching power converter; (b) sensing (14a) a first magnitude of both ICHARGE and ILOAD; (c) storing (20) the sensed magnitude; (d) sensing a second magnitude of both ICHARGE and ILOAD; and (e) comparing (22) the stored first magnitude to the sensed second magnitude.

Abstract: In a method and apparatus for partitioning and packaging a power generation and distribution system, a plurality of power supply modules are distributed along the length of the backplane such that backplane voltage drops are minimized and such that power supply currents flow essentially orthogonal to the signal connections between the backplane slots. In this manner, signal interference is minimized and the need for bus bars on the backplane are substantially reduced or eliminated.