Patents Examined by Philip Guyton
  • Patent number: 11321165
    Abstract: A method for log data sampling is disclosed. The method includes receiving logs of a computer system. A log comprises information regarding an operation of the computer system. The method also includes determining a sample of the logs by applying a set of sampling methods to the logs. The method further includes providing the sample of the logs as an input to an anomaly detection model for the computer system. The anomaly detection model identifies a fault in the operation of the computer system based on the input.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: May 3, 2022
    Assignee: International Business Machines Corporation
    Inventors: Xiaotong Liu, Jiayun Zhao, Anbang Xu, Rama Kalyani T. Akkiraju
  • Patent number: 11321459
    Abstract: The disclosure generally provides methods, systems and apparatus for an improved a Physically Unclonable Function (PUF). In one embodiment, the disclosure relates to a method to provide data from a Physically Unclonable Function (PUF) circuit array. The method includes storing a plurality of first data bits into a respective ones of a plurality of first bitcells of the PUF array to form a first dataset; storing a plurality of second data bits into a respective ones of a plurality of second bitcells of the PUF array, the plurality of second data bits defining a helper dataset; reading the first dataset from the plurality of first bitcells to provide a first read dataset; applying an error correction factor to the first read data dataset to form a security key dataset; and outputting the security key dataset from the PUF circuit array.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: May 3, 2022
    Assignee: INTEL CORPORATION
    Inventors: Kuan-Yueh Shen, David Johnston, Rachael J. Parker, Javier Dacuna Santos
  • Patent number: 11301346
    Abstract: A system includes a processing device and a memory device coupled to the processing device. The memory device can include a cyclic buffer portion and a snapshot portion. The processing device can store time based telemetric sensor data in the cyclic buffer portion, copy an amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion in response to a trigger event, operate the cyclic buffer portion with a first trim tailored to a performance target of the cyclic buffer portion, and operate the snapshot portion with a second trim tailored to a performance target of the snapshot portion.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: April 12, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Todd A. Marquart, Niccolo′ Righetti, Jeffrey S. McNeil, Jr., Akira Goda, Kishore K. Muchherla, Mark A. Helm, Gil Golov, Jeremy Binfet, Carmine Miccoli, Giuseppina Puzzilli
  • Patent number: 11288142
    Abstract: The technology disclosed relates to discovering multiple previously unknown and undetected technical problems in fault tolerance and data recovery mechanisms of modem stream processing systems. In addition, it relates to providing technical solutions to these previously unknown and undetected problems. In particular, the technology disclosed relates to discovering the problem of modification of batch size of a given batch during its replay after a processing failure. This problem results in over-count when the input during replay is not a superset of the input fed at the original play. Further, the technology disclosed discovers the problem of inaccurate counter updates in replay schemes of modem stream processing systems when one or more keys disappear between a batch's first play and its replay. This problem is exacerbated when data in batches is merged or mapped with data from an external data store.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: March 29, 2022
    Assignee: salesforce.com, inc.
    Inventors: Elden Gregory Bishop, Jeffrey Chao
  • Patent number: 11288153
    Abstract: A device configured to periodically monitor operational activity of hardware components within a computing system infrastructure. The device is further configured to detect an issue that is associated with a hardware component, to identify commands that are sent to the hardware component to resolve the first issue, and to identify a test environment configuration for simulating the effect of sending the commands to the hardware component on the computing system infrastructure. The device is further configured to generate a solution script based on the identified commands and a testing script based on the identified test environment configuration, and to store an association between the first issue, the solution script, and the testing script in a script map.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: March 29, 2022
    Assignee: Bank of America Corporation
    Inventors: Sasidhar Purushothaman, Ankush Sethi, Gowthaman Trichy Karuppusamy, Shikha Dixit
  • Patent number: 11275116
    Abstract: Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The received scan frames contain stimulus data to be applied to circuitry within the device to be tested, a command for enabling a test control operation, and a frame marker bit to indicate the end of the scan frame pattern. The inputting of scan frames can occur continuously and simultaneous with a commanded test control operation.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: March 15, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Patent number: 11275644
    Abstract: Techniques facilitating voltage droop reduction and/or mitigation in a processor core are provided. In one example, a system can comprise a memory that stores, and a processor that executes, computer executable components. The computer executable components can comprise an observation component that detects one or more events at a first stage of a processor pipeline. An event of the one or more events can be a defined event determined to increase a level of power consumed during a second stage of the processor pipeline. The computer executable components can also comprise an instruction component that applies a voltage droop mitigation countermeasure prior to the increase of the level of power consumed during the second stage of the processor pipeline and a feedback component that provides a notification to the instruction component that indicates a success or a failure of a result of the voltage droop mitigation countermeasure.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: March 15, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Giora Biran, Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo, Ramon Bertran Monfort, Phillip John Restle, Christos Vezyrtzis, Tobias Webel
  • Patent number: 11269750
    Abstract: A method and information handling system configured to store, via a monitoring system data repository memory device, aggregate information handling system performance telemetry data crowd-sourced from a population of information handling systems and categorized into mapping classifications based on software application inventory and software application associations with drivers and libraries and to execute instructions, via an application processor, of an information handling system diagnostic platform in an intelligent configuration management system to obtain aggregate information handling system performance telemetry data for a performance characteristic of information handling systems having a first mapping classification corresponding to a client information handling system, and to construct, at the management information handling system, a performance characteristic baseline of operation across the aggregated telemetry data for one mapping classification and receive monitored telemetry data for the per
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: March 8, 2022
    Assignee: Dell Products, LP
    Inventors: Anantha K. Boyapalle, Michael S. Gatson, Marc R. Hammons, Danilo O. Tan, Nikhil M. Vichare
  • Patent number: 11269705
    Abstract: Embodiments of the present disclosure disclose a method and apparatus for outputting information. A specific embodiment of the method comprises: connecting a database, in response to receiving a request for detecting the database; performing a write operation on a heartbeat table in the database, in response to detecting the connection with the database being normal; performing a read operation on the heartbeat table in the database, in response to detecting the write operation for the heartbeat table being abnormal; performing on the database an operation of writing a file to a hard disk, in response to detecting the read operation on the heartbeat table being normal; and outputting first information for representing a cause of a database failure, in response to detecting the operation of writing the file to the hard disk being abnormal. This embodiment improves the accuracy of the detection on the database failure.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: March 8, 2022
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGV CO., LTD.
    Inventor: Guowei Zeng
  • Patent number: 11269710
    Abstract: A diagnostic apparatus acquires data relating to a state of a machine, performs preprocessing on the acquired data, and modifies the preprocessed data by using a statistic relating to the state of the machine. Then, the diagnostic apparatus performs a process of machine learning by an auto encoder on the basis of the modified data and learns or diagnoses the state of the machine. Thus, this diagnostic apparatus provides a learning and inference method capable of uniformly handling a scale of data indicating a feature.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: March 8, 2022
    Assignee: FANUC CORPORATION
    Inventor: Kazuhiro Satou
  • Patent number: 11256520
    Abstract: Tracing status of a programmable device can include, in response to loading a device image for the programmable device, determining, using a processing unit on the programmable device, trace data for the device image, storing, by the processing unit, the trace data for the device image in a memory, and, in response to unloading the device image, recording the unloading of the device image in the trace data in the memory.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 22, 2022
    Assignee: Xilinx, Inc.
    Inventors: David P. Schultz, Adrian M. Hernandez, David Robinson, Elessar Taggart, Max Heimer
  • Patent number: 11256559
    Abstract: A display system includes an information processing apparatus and an information processing terminal communicable with the information processing apparatus via a network. The information processing terminal is installed with an application that when executed by one or more first processors of the information processing terminal causes the one or more first processors to detect an error that has occurred at the information processing terminal, and notify the information processing apparatus of the detected error. The information processing apparatus includes one or more second processors configured to detect an error that has occurred at the information processing apparatus, and enable information relating to the error detected by the one or more second processors of the information processing apparatus and the error notified from the information processing terminal to be displayed on a first display.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: February 22, 2022
    Assignee: Ricoh Company, Ltd.
    Inventor: Tsuyoshi Yamada
  • Patent number: 11249889
    Abstract: Disclosed herein are system, method, and computer program product embodiments for providing anomaly feedback monitoring and detection. An embodiment operates by determining a first set of data corresponding to an anomaly indicating an undesirable data state for a first application. A subset of data from a second set of data corresponding to the undesirable data state is identified, wherein the second set of data is associated with communications between the first application and a second application. A notification identifying the anomaly is provided. Feedback associated with the anomaly is received. Data corresponding to the anomaly is updated based on the feedback.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: February 15, 2022
    Assignee: salesforce.com, inc.
    Inventors: Ignacio Agustin Manzano, Agustin Lopez Gabeiras, Leandro Damián Lück, Gaston Alberto Lodieu, Diego Gabriel Larralde, Jiang Wu, Andrew Craig Bragdon
  • Patent number: 11216327
    Abstract: A method for detecting computer issues includes identifying a target computer system. A first set of data for a first time period relating an operating metric from the target computer system are received. The operating metric is stored. A second set of data for a second time period relating to the operating metric is received. The first and second sets of data are compared. A difference between the two sets of data is identified. If the difference between the two sets of data is within a range a warning notification is displayed in a graphical user interface. An input is received in the graphical user interface in response to the warning notification being displayed.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: January 4, 2022
    Assignee: United Services Automobile Association (USAA)
    Inventors: Manuel A. Carranza, Chase T. Sekula, Mark S. Moore, Mathew P. Ringer
  • Patent number: 11215971
    Abstract: A design support system includes memory, a receiving unit, and an associating unit. The memory stores information on design element classification that classifies a design element included in a product, and information on design requirement classification that classifies a design requirement required for the product. The receiving unit receives technical information regarding a design trouble. The associating unit refers to technical information regarding a design trouble, received by the receiving unit, and associates a classification item in the design requirement classification to which the design trouble belongs and a classification item in the design element classification to which a design element causing the design trouble belongs with each other, along with information on a phenomenon indicating a failure status of the design element included in the technical information.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: January 4, 2022
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Yasuaki Miyazawa, Makoto Fuchigami, Kimihiro Wakabayashi, Yoshikazu Okamoto, Hiroshi Murano, Nobukazu Takahashi, Masaki Suda, Mari Horie, Naoki Koike, Masao Okubo
  • Patent number: 11194651
    Abstract: A method, apparatus, and system for handling a failure of a hardware cryptography/compression accelerator is disclosed. The operations comprise: detecting that a hardware cryptography/compression accelerator at a first data storage system has failed; determining one or more failed cryptography and/or compression operation tasks that were submitted to the hardware cryptography/compression accelerator but were not completed due to the failure of the hardware cryptography/compression accelerator; and performing a remedial operation in response to the hardware cryptography/compression accelerator failure to prevent a systemic failure.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: December 7, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Wei Lin, Yujuan Li, Tao Chen, Yong Zou, Rahul Ugale
  • Patent number: 11188416
    Abstract: Several embodiments of systems incorporating memory components are disclosed herein. In one embodiment, a memory system can include a memory component and a processing device configured to access quality metrics corresponding to memory regions of the memory component. In some embodiments, the processing device can compare the quality metrics to one or more memory management thresholds. In some embodiments, when the quality metrics meet and/or exceed a first threshold, a refresh operation can be scheduled and/or performed on a corresponding memory region. In these and other embodiments, when the quality metrics meet and/or exceed a second threshold, the memory region is retired and removed from an active pool of memory regions.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: November 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Gerald L. Cadloni, Bruce A. Liikanen
  • Patent number: 11182253
    Abstract: A self-healing system configured to automatically restore non-responsive or failed applications to a normal operating state. A self-healing system may restart an application after confirming that the application itself has failed—and not an underlying dependency failure. The self-healing system may also evaluate a server hosting an application reported as being non-responsive to determine whether that server has itself failed. If an application is non-responsive or has failed on an otherwise healthy host, and the dependent service use by the application are available, the self-healing system automatically restores the application to a responsive state. To do so, the self-healing system may generate a run list specifying a sequence of scripts invoked to restore the application to the responsive state.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: November 23, 2021
    Assignee: INTUIT INC.
    Inventors: Debajit Kataki, Aravind Gv
  • Patent number: 11175974
    Abstract: Systems, apparatuses, and/or methods may manage a fault condition in a computer system. An apparatus may dynamically publish a message over a publisher-subscriber system and dynamically subscribe to a message over the publisher-subscriber system, wherein at least one message may be used to address a fault condition in the computing system. The apparatus may predict a fault condition in a high performance computing (HPC) system, communicate fault information to a user, monitor health of the HPC system, respond to the fault condition in the HPC system, recover from the fault condition in the HPC system, maintain a rule for a fault management component, and/or communicate the fault information over the publisher-subscriber system in real-time. Messages may also be aggregated to minimize fault information traffic. The publisher-subscriber system may facilitate dynamic and/or real-time coordinated, integrated (e.g., system-wide), and/or scalable fault management.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: November 16, 2021
    Assignee: Intel Corporation
    Inventor: Annapurna Dasari
  • Patent number: 11169897
    Abstract: By monitoring requests to and from components of an application, an application analysis engine generates an inter-component graph for an application that identifies how the various components in the application are connected. When a performance issue is detected in association with the application, a traversal module traverses the inter-component graph to determine the possible execution paths that may have been the cause of the detected issue. The traversal module transmits requests to the correlation module to compare the metrics time series of the different components in the execution path with the detected issue. The correlation module compares metrics time series with the issue metric to identify correlations between execution patterns. The results of the correlation may be presented in a report that visually identify the root cause of the detected issues.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: November 9, 2021
    Assignee: NEW RELIC, INC.
    Inventors: Lewis Karl Cirne, Etan Lightstone, Jason Snell