Patents Examined by Phuc Dang
  • Patent number: 10355056
    Abstract: The present disclosure relates to an OLED device and a manufacturing method thereof, a display panel and a display device. The OLED device includes: a first electrode disposed on a substrate; an organic light emitting layer disposed on the first electrode; a second electrode disposed on the organic light emitting layer; and a stack of layers disposed on the second electrode. The stack of layers includes at least one inorganic layer and at least one organic layer. The at least one inorganic layer and at least one organic layer are alternately arranged. One organic layer of the at least one organic layer includes a color conversion layer.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: July 16, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Renrong Gai, Weilin Lai
  • Patent number: 10290642
    Abstract: Flash memory technology is disclosed. In one example, a flash memory cell can include a charge storage structure, a control gate laterally separated from the charge storage structure, and at least four dielectric layers disposed between the control gate and the charge storage structure. Associated systems and methods are also disclosed.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: May 14, 2019
    Assignee: Intel Corporation
    Inventors: Haitao Liu, Guangyu Huang, Krishna K. Parat, Shrotri B. Kunal, Srikant Jayanti
  • Patent number: 10283715
    Abstract: The present invention relates to a composition comprising: a) at least one organic solvent; b) at least one conductive polymer, preferably a cationic polymer; c) at least one fluorinated compound; d) at least one polymeric anion, wherein the at least one polymeric anion is a copolymer comprising ionic and non-ionic repeating units. The present invention also relates to a layered structure comprising the composition, to a process for the production of the composition, to a process for the production of the layered structure and to devices comprising the layered structure as well as to the use of the composition in devices to achieve a prolongation of lifetime.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: May 7, 2019
    Assignee: HERAEUS DEUTSCHLAND GMBH & CO. KG
    Inventors: Stefan Schumann, Nina Kausch-Busies, Wilfried Lövenich, Jan Sütterlin, Andreas Elschner, Arnulf Scheel
  • Patent number: 10283579
    Abstract: There is provided a semiconductor device that includes a substrate, an electric field shielding layer, and a semiconductor element. The electric field shielding layer is provided on the substrate. The semiconductor element includes an electrode, and is provided on the electric field shielding layer with an insulating film in between.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: May 7, 2019
    Assignee: JOLED, Inc.
    Inventors: Yuichiro Ishiyama, Yuichi Kato, Tomoatsu Kinoshita, Takashige Fujimori, Kenta Masuda, Keiichi Akamatsu
  • Patent number: 10274935
    Abstract: A system and method of creating a shape-conforming lattice structure for a part formed via additive manufacturing. The method includes receiving a computer model of the part and generating a finite element mesh. A lattice structure including a number of lattice cellular components may also be generated. Some of the mesh elements of the finite element mesh may be deformed so that the finite element mesh conforms to the overall shape of the part. The lattice structure may then be deformed so that the lattice structure has a cellular periodicity corresponding to the finite elements of the finite element mesh. In this way, the part retains the benefits of its overall shape and the benefits of lattice features without introducing structural weak points, directional stresses, and other structural deficiencies.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: April 30, 2019
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventor: Gregory John Vernon
  • Patent number: 10276550
    Abstract: The present invention provides a light emitting diode display and a manufacture method thereof. The manufacture method of the light emitting diode forms the first anode covering the first through hole and possessing the reflection property on the planarization layer, and can use the reflection property of the first anode to gather and reflect the divergent light emitted by the light emitting diode located inside the first through hole to raise the light utilization and to promote the display quality. The light emitting diode of the present invention locates the first anode covering the first through hole and possessing the reflection property on the planarization layer, and can use the reflection property of the first anode to gather and reflect the divergent light emitted by the light emitting diode located inside the first through hole to raise the light utilization and to promote the display quality.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: April 30, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Baixiang Han, Poyen Lu
  • Patent number: 10263058
    Abstract: An organic light-emitting diode display is disclosed. The display includes a semiconductor layer formed over a substrate, a scan line formed over the semiconductor layer and configured to provide a scan signal, and a light emission control line formed over the semiconductor layer and configured to provide a light emission control signal. The display includes a data line configured to provide a data voltage and a driving voltage line configured to provide a driving voltage, wherein the driving voltage line crosses the scan line and is electrically insulated from the scan line. A switching transistor is electrically connected to the scan line and the data line and includes a switching drain electrode. A driving transistor includes a driving source electrode electrically connected to the switching drain electrode. Any one of the semiconductor layer and the light emission control line includes an extension at least partially overlapping the data line.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: April 16, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Kyu Lee, Chae Han Hyun, Ki Myeong Eom
  • Patent number: 10263057
    Abstract: The present disclosure discloses an OLED panel, including: a substrate and a driving thin film transistor, a switching thin film transistor, a storage capacitor, an organic light emitting device, and a light emitting device formed on the substrate, an external voltage signal is stored in the storage capacitor via the switching thin film transistor, the external voltage signal controls a magnitude of on-current of the driving thin film transistor to control the gray scale of the organic light emitting device. The present disclosure further discloses a manufacturing method of OLED panel. In the present disclosure, the drain of the low temperature polysilicon thin film transistor is in contact with the bottom electrode of the organic light emitting device so that the current supplied to the organic light emitting device is stabilized; metal-oxide-semiconductor thin-film transistor has a low leakage current, so that a better circuit-closing effect can be achieved.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 16, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Xingyu Zhou, Shipeng Chi
  • Patent number: 10263050
    Abstract: A hybrid pixel arrangement for a full-color display is provided, which includes an inorganic LED in at least one sub-pixel, and an organic emissive stack in at least one other sub-pixel. In an embodiment, a first sub-pixel is configured to emit a first color, and includes an inorganic LED, a second sub-pixel is configured to emit a second color, and includes a first organic emissive stack configured to emit an initial color different from the first color. A third sub-pixel is configured to emit a third color different from the initial color.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 16, 2019
    Assignee: Universal Display Corporation
    Inventors: Michael Hack, Michael Stuart Weaver, William T. Mayweather, III, Julia J. Brown, Nicholas J. Thompson
  • Patent number: 10261067
    Abstract: A nanopore FET sensor device and method of making. The nanopore FET sensor device includes a FET device stack of material layers including a source, channel and drain layers, and a nanoscale hole through the FET device stack to permit flow of strands of molecular material, e.g., DNA, therethrough. The perimeter of the nanoscale hole forms a FET device gate surface. The source and drain layers are provided with respective contacts for connection with measuring instruments that measure a flow of current therebetween. The molecular strands having charged portions pass from one side of a wafer substrate to the other side through the (nanopore) gate and modulate the current flow sensed at the source or drain terminals. The sensor collects real-time measurements of the current flow modulations for use in identifying the type of molecule. Multiple measurements by the same nanopore FET sensor are collected and compared for enhanced detection.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: April 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: John U. Knickerbocker, Effendi Leobandung
  • Patent number: 10262974
    Abstract: A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor devices. In an embodiment the package is an integrated fan out package. The link device may be bonded on either side of the package, and the package may optionally comprise through package vias. The link device may also be an integrated passive device that includes resistors, inductor, and capacitor components.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: April 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chao-Yang Yeh, Ming-Tsun Lin, Hau Tao
  • Patent number: 10256439
    Abstract: The present invention relates to a tandem organic light-emitting element, more particularly to a tandem organic light-emitting element which may decrease a driving voltage in a driving region of a charge generation layer by sequentially laminating an electronics layer, which is doped with a metal dopant, and an electronics layer, which is doped with an organic dopant, on one side of the charge generation layer, thereby having increased power efficiency and life span.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: April 9, 2019
    Assignees: Corning Precision Materials Co., Ltd., University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hyung Seok Lee, Kwang Je Woo, Jang Dae Youn, Jang Hyuk Kwon, Young Hoon Son
  • Patent number: 10249760
    Abstract: The disclosure discloses a thin film transistor and a manufacturing method thereof, a liquid crystal display panel, a transition pattern is disposed between a doping pattern and a source electrode pattern, the transition pattern covers sidewalls of the source electrode pattern and the drain electrode pattern respectively to insulate an active pattern and the sidewalls of the source electrode pattern and the drain electrode pattern in direct contact, so as to reduce leakage current of a TFT. Moreover, two sides of the transition pattern adjacent to the active pattern are covered by the doping pattern, which can reduce contact impendence of the active pattern and the source electrode pattern as well as the drain electrode pattern, so as to prevent the problem of insufficient charge of the TFT.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: April 2, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Xiaowen Lv
  • Patent number: 10249571
    Abstract: A thin film transistor comprises an active layer; a light-protection layer disposed above the active layer and/or disposed beneath the active layer, the light-protection layer being configured to absorb light having a predetermined wavelength. By providing a light-protection layer above the active layer, light incident onto the channel region from top of the thin film transistor can be absorbed, while by providing a light-protection layer under the active layer, light incident onto the channel region from bottom of the thin film transistor can be absorbed, thereby effectively avoiding influence of light on the active layer of the channel region and ensuring a relatively strong light stability of the driving transistor in the thin film transistor. A method for manufacturing a thin film transistor and an array substrate comprising the thin film transistor as well as an array substrate and a display device comprising the thin film transistor are further provided.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: April 2, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Meili Wang
  • Patent number: 10249602
    Abstract: The present invention provides a light emitting diode display and a manufacture method thereof. The manufacture method of the light emitting diode display according to the present invention arranges an anode contact layer to increase the contact area of the second anode of the light emitting diode and the first anode of the TFT backplate to ensure the fine contact between the second anode and the first anode for avoiding the problem that the second anode and the first anode are in bad contact due to the poor welding for stabilizing the luminous performance of the light emitting diode to promote the display quality of the light emitting diode display; furthermore, the present application uses ink jet printing to form the anode contact layer and the cathode insulation layer, and the manufacture process is simple and the production cost is low.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: April 2, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Baixiang Han
  • Patent number: 10236461
    Abstract: An organic photoelectronic device may include a photoelectronic conversion layer between a first electrode and a second electrode and a buffer layer on the photoelectronic conversion layer. The photoelectronic conversion layer may be between a first electrode and a second electrode, and the buffer layer may be between the first electrode and the photoelectronic conversion layer. The photoelectronic conversion layer may include at least a first light absorbing material and a second light absorbing material configured to provide a p-n junction. The buffer layer may include the first light absorbing material and a non-absorbing material associated with a visible wavelength spectrum of light. The non-absorbing material may have a HOMO energy level of about 5.4 eV to about 5.8 eV. The non-absorbing material may have an energy bandgap of greater than or equal to about 2.8 eV.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: March 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Takkyun Ro, Kyung Bae Park, Ryuichi Satoh, Yong Wan Jin, Chul Joon Heo
  • Patent number: 10222781
    Abstract: Apparatus for monitoring and providing visual representations of the operating conditions of machine tool parameters, in particular for program-controlled turning, milling, and drilling machines, which have a machining unit displaceable in a plurality of coordinate axes, in which a work spindle for exchangeable receiving a machining tool and an electric motor for driving the work spindle are mounted. The machine tool includes a control unit and means for monitoring the operating state of the machine tool. The monitoring apparatus has at least one sensor for detecting at least one operating parameter of the machine tool. An evaluating unit is connected to both the sensor and the control unit and processes the measurement values detected by the sensor. An optical display is provided in the direct viewing range of the operator, which viewing range includes the machine operating spindle, tool holder, tool, and workplace.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: March 5, 2019
    Assignee: DECKEL MAHO Pfronten GmbH
    Inventors: Armin Bornemann, Reinhold Seitz, Hans Gronbach, Peter Pruschek
  • Patent number: 10217903
    Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body arranged on the carrier with a semiconductor layer sequence, wherein the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and generates or receives electromagnetic radiation, the first semiconductor layer connects to a first contact in an electrically-conductive manner, the first contact is formed on a rear side of the carrier facing away from the semiconductor body, the second semiconductor layer connects to both a second contact and a third contact in an electrically-conductive manner, and the second contact is formed on the front side of the carrier facing towards the semiconductor body and the third contact on the rear side of the carrier facing away from the semiconductor body.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: February 26, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Korbinian Perzlmaier, Christian Leirer
  • Patent number: 10211327
    Abstract: Semiconductor devices including an elevated or raised doped crystalline structure extending from a device layer are described. In embodiments, III-N transistors include raised crystalline n+ doped source/drain structures on either side of a gate stack. In embodiments, an amorphous material is employed to limit growth of polycrystalline source/drain material, allowing a high quality source/drain doped crystal to grow from an undamaged region and laterally expand to form a low resistance interface with a two-degree electron gas (2DEG) formed within the device layer. In some embodiments, regions of damaged GaN that may spawn competitive polycrystalline overgrowths are covered with the amorphous material prior to commencing raised source/drain growth.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: February 19, 2019
    Assignee: Intel Corporation
    Inventors: Marko Radosavljevic, Sansaptak Dasgupta, Sanaz K. Gardner, Seung Hoon Sung, Han Wui Then, Robert S. Chau
  • Patent number: 10211634
    Abstract: A method for dynamic state estimation (DSE) in a power distribution system (PDS) determines a new state of the PDS from a current state of the PDS via an indirect state transition model defining a transition of the current state of the PDS to the new state of the PDS through a transition of a current power injection to a new power injection on each bus of the PDS. The method measures one or combination of power flows, power injections, voltage magnitudes and phase angles on the measuring buses in the PDS and updates the new state of the PDS based on corresponding differences between one or combination of the estimated power flows, the estimated power injections, the estimated voltage magnitudes and the estimated phase angles with the measured power flows, the measured power injections, the measured voltage magnitudes and the measured phase angles.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: February 19, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Hongbo Sun, Guangyu Feng