Patents Examined by Prasith Thammavong
  • Patent number: 10013166
    Abstract: A virtual tape library system is used to back up data from a client archive system expecting physical tape operations onto logical data containers and/or a metadata store of a storage service by emulating the physical tape operations. For example, a virtual tape library appliance is installed at a customer premise location to interface with a client archive system. The virtual tape library appliance provides virtual interfaces to appear as physical tape library subsystems, such as tape drives and media changing interfaces. However, these virtual interfaces are supported by logical data containers in a storage service and a metadata store. The virtual tape library system allows the client archive system to make requests to import new virtual tapes, export virtual tapes for archiving, store virtual tapes at a virtual location, load and eject virtual tapes into a virtual tape drive and operate on virtual tapes in a virtual tape drive.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: July 3, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Pradeep Vincent, Craig Carl, Arun Sundaram
  • Patent number: 10007455
    Abstract: Masking information may be automatically determined for a host after zoning between the host and data storage system is complete. Processing may include the host sending host registration commands from host initiators. From registration information provided with the host registration commands, an initiator group may be determined for the masking view as including the initiators identified as belonging to the host. A port group may be determined as those target ports at which the host registration commands are received. A default storage group with a default device may be created. A masking view for the host may be created that includes the initiator group, the target port group and the default storage group whereby the masking view indicates that the first device is accessible or exposed, through each target port of the target port group, to each initiator of the initiator group.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: June 26, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Subin George, Violet S. Beckett, Arieh Don, Vinay Rao, Michael Specht
  • Patent number: 9996274
    Abstract: A method and system for controlling an MBC configured flash memory device to store data in an SBC storage mode, or a partial MBC storage mode. In a full MBC storage mode, pages of data are programmed sequentially from a first page to an Nth page for each physical row of memory cells. Up to N virtual page addresses per row of memory cells accompany each page to be programmed for designating the virtual position of the page in the row. For SBC or partial MBC data storage, a flash memory controller issues program command(s) to the MBC memory device using less than the maximum N virtual page addresses for each row. The MBC memory device sequentially executes programming operations up to the last received virtual page address for the row.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: June 12, 2018
    Assignee: Conversant Intellectual Property Management Inc.
    Inventor: Jin-Ki Kim
  • Patent number: 9996461
    Abstract: A method for storing data on a storage device includes receiving data to be stored and a logical address for storing the data. A physical address is determined and the data to be stored is stored at the determined physical address. A table that associates logical addresses with physical addresses is examined to determine a difference relationship between the determined physical address and a corresponding physical address for one of other logical addresses. Information representing the determined physical address is stored in the table, in association with the received logical address, as a function of the determined difference relationship. A data storage device includes controller circuitry and memory for storing a lookup table that associates logical addresses with physical addresses. The controller circuitry operates in accordance with the method.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: June 12, 2018
    Assignee: Marvell International Ltd.
    Inventors: Wei Xu, Ka-Ming Keung, Fei Sun, Jinjin He, ChengKuo Huang, Tony Yoon
  • Patent number: 9990155
    Abstract: A storage control device configured to be coupled to a storage device including a first portion and a second portion, the storage control device includes a memory, and a processor configured to control an operation mode of the first portion of the storage device to be in a first mode and a second mode, a first power consumed by the first portion in the first mode being less than a second power consumed by the first portion in the second mode, set the operation mode of the first portion in the first mode, receive a first request, determine whether the received first request is a polling access request, and when the received first request is the polling access request, keep the operation mode of the first portion in the first mode, and read first data from the second portion.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: June 5, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Tadashi Matsumura, Tomohiko Muroyama, Motoki Sotani, Noriyuki Yasu
  • Patent number: 9990156
    Abstract: Deduplicating snapshot associated with a backup operation is disclosed, including: performing a backup operation including by generating a plurality of snapshots; maintaining, at a source system, deduplication data corresponding to one or more data blocks that have already been written to backup media during the backup operation; and using the deduplication data to deduplicate backup data across the plurality of snapshots.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: June 5, 2018
    Assignee: EMC IP Holding Company LLC
    Inventor: Nirmala Kandamuthan
  • Patent number: 9983801
    Abstract: A method for a storage area network includes setting a priority indicator in a signal of a storage request to form a high priority storage request for a storage target in the storage area network. The method further includes transmitting the high priority storage request to the storage target before the transmission of at least one normal priority storage request. The high priority storage request then traverses the storage area network with a higher priority than a normal priority storage request to the storage target. Upon receiving the high priority storage request, the storage target executes the high priority storage request prior to executing at least one normal priority storage request.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: May 29, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Mark J. Karnowski, Jon Infante
  • Patent number: 9983914
    Abstract: This application discloses a computing system configured to request that an operating system implemented by the computing system allocate a virtual address space, which is designated for use by an application implemented by the computing system, to a memory verification tool implemented by the computing system. The computing system is configured to utilize the virtual address space to form a memory pool having multiple protectable slots available for allocation to the application. The computing system is further configured to intercept a memory allocation request issued by the application to the operating system of the computing system, and allocate at least one of the protectable slots in the memory pool to the application in response to the intercepted memory allocation request.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: May 29, 2018
    Assignee: Mentor Graphics Corporation
    Inventors: Grzegorz Plonka, Rafal Strużyk
  • Patent number: 9977600
    Abstract: A system and method for efficiently maintaining metadata stored among a plurality of solid-state storage devices. A data storage subsystem supports multiple mapping tables. Records within a mapping table are arranged in multiple levels. Each level stores at least pairs of a key value and a physical pointer value. The levels are sorted by time. New records are inserted in a created new highest (youngest) level. No edits are performed in-place. A data storage controller determines both a cost of searching a given table exceeds a threshold and an amount of memory used to flatten levels exceeds a threshold. In response, the controller incrementally flattens selected levels within the table based on key ranges. After flattening the records in the selected levels within the key range, the records may be removed from the selected levels. The process repeats with another different key range.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 22, 2018
    Assignee: Pure Storage, Inc.
    Inventors: Marco Sanvido, Richard Hankins, Mark McAuliffe, Neil Vachharajani
  • Patent number: 9971850
    Abstract: Described herein are hash table structures and system and methods for creating and storing data in the hash table structures. Hash tables and input buffers associated with same are configured in several arrangements, including multi-level hash tables and nested multi-level hash tables. The hash table structures described herein are well suited for being configured in the memory blocks of field-programmable gate arrays.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventor: Takanori Ueda
  • Patent number: 9965216
    Abstract: Providing snapshots for a logical device includes maintaining a global sequence number for the logical device, providing a snapshot table having a plurality of entries, where each of the entries corresponds to a targetless snapshot and includes a sequence number associated with a particular one of the targetless snapshots, the sequence number corresponding to the global sequence number at a time each of the snapshots is created, and, if a sequence number associated with a specific portion of the logical device is less than the global sequence number, then prior to moving new data to a specific portion of the logical device, copying old data from the specific portion to a location in a pool device, setting a pointer in a replication data pointer table to point to the location in the pool device and setting the sequence number associated with the specific portion to equal the global sequence number.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: May 8, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Sathyanarayan Jaganathan, Hana Moreshet, Avraham Nash, Ning Wu, Deepak Vokaliga, Jayapaul Paul
  • Patent number: 9966152
    Abstract: A deduplication memory module, which is configured to internally perform memory deduplication, includes a hash table memory for storing multiple blocks of data in a hash table array including hash tables, each of the hash tables including physical buckets and a plurality of virtual buckets each including some of the physical buckets, each of the physical buckets including ways, an address lookup table memory (ALUTM) including a plurality of pointers indicating a location of each of the stored blocks of data in a corresponding one of the physical buckets, and a buffer memory for storing unique blocks of data not stored in the hash table memory when the hash table array is full, a processor, and memory, wherein the memory has stored thereon instructions that, when executed by the processor, cause the memory module to exchange data with an external system.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: May 8, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chaohong Hu, Hongzhong Zheng, Krishna Malladi, Bob Brennan
  • Patent number: 9965190
    Abstract: According to one aspect of the present disclosure, a system and technique for capacity forecasting is disclosed. The system includes a host having a processor unit and a memory. Resource data stored associated with an environment is stored in the memory, the resource data comprising inventory information of applications, processing resources and storage resources of the environment. A ledger module is executable by a processor unit to: create a capacity-associated transaction; identify and link at least one of an application, processing resource and storage resource to the transaction from the resource data; determine an initiation time and duration associated with the transaction; and forecast a change in capacity of at least one linked storage resource for the transaction and a time of the change in capacity.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: May 8, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sonia Cheng, Pamela H. Hurwitch, Roman Kisin, Anirudh Oswal, Deidre Paknad, Irina Simpson
  • Patent number: 9959214
    Abstract: An emulated input/output memory management unit (IOMMU) includes a management processor to perform page table translation in software. The emulated IOMMU can also include a hardware input/output translation lookaside buffer (IOTLB) to store translations between virtual addresses and physical memory addresses. When a translation from a virtual address to a physical address is not found in the IOTLB for an I/O request, the translation can be generated by the management processor using page tables from a memory and can be stored in the IOTLB. Some embodiments can be used to emulate interrupt translation service for message based interrupts for an interrupt controller.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 1, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Leah Shalev, Nafea Bshara
  • Patent number: 9959053
    Abstract: The present invention provides a method for constructing an NVRAM-based efficient file system, including the following steps: S1. determining a file operation type of the file system, where the file operation type includes a file read operation, a non-persistent file write operation, and a persistent file write operation; and S2. if the file operation type is a non-persistent file write operation, writing, by the file system, content of the non-persistent file write operation to a dynamic random access memory DRAM, updating a corresponding DRAM cache block index, and flushing, at a preset time point, the content of the non-persistent file write operation back to a non-volatile random access memory NVRAM asynchronously, or otherwise, copying, by the file system, related data directly between the NVRAM/DRAM and the user buffer.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 1, 2018
    Inventors: Jiwu Shu, Jiaxin Ou, Youyou Lu
  • Patent number: 9959047
    Abstract: According to one aspect of the present disclosure, a method and technique for capacity forecasting is disclosed. The method includes: storing, in a memory, resource data associated with an environment, the resource data comprising inventory information of applications, processing resources and storage resources of the environment; and providing a ledger module executable by a processor unit to: create a capacity-associated transaction; identify and link at least one of an application, processing resource and storage resource to the transaction from the resource data; determine an initiation time and duration associated with the transaction; and forecast a change in capacity of at least one linked storage resource for the transaction and a time of the change in capacity.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: May 1, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sonia Cheng, Pamela H. Hurwitch, Roman Kisin, Anirudh Oswal, Deidre Paknad, Irina Simpson
  • Patent number: 9952766
    Abstract: A memory device capable of performing an overwrite operation, a memory system, and a method of operating the memory system are provided. The method includes receiving one or more write requests, a logical address and data corresponding to the one or more write requests; comparing a result of analyzing at least one of the received one or more write requests, logical address, and data with a threshold value; and writing data using a first update method or a second update method, based on a result of the comparison. When the first update method is selected, the data are written in a region indicated by a physical address corresponding to the logical address according to address mapping information. When the second update method is selected, information of the physical address corresponding to the logical address is changed, and the data are written in a region indicated by the changed physical address.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Jae Woo, Kyoung-Il Bang, Sung-Yong Seo, Eun-Chu Oh, Moon-Sang Kwon, Han-Shin Shin
  • Patent number: 9952967
    Abstract: According to one embodiment, a method for controlling a nonvolatile memory includes allocating a first system block to a physical block included in one of the first and second parallel operation elements. The first system block is used by a first CPU controlling the nonvolatile memory but is not used by a second CPU controlling the nonvolatile memory. The method includes allocating a second system block to a physical block included in the other of the first and second parallel operation elements. The second system block is used by the second CPU but is not used by the first CPU.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 24, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Minako Morio
  • Patent number: 9952809
    Abstract: A data handling system having a physical storage device and a storage controller responsible for provisioning, managing, and servicing logical unit numbers (LUNs) with self-destruction properties on the physical storage device is disclosed. For a given LUN, the storage controller creates a profile including self-destruction properties, such as a LUN destruction date, and associates the profile with the LUN. The profiles may be independent of file format and content of any associated data and the LUN destruction date may be a function of the last access date of the associated data. The storage controller monitors the LUN destruction date associated with each LUN and determines the last access date of any associated data. The storage controller marks a LUN having a past-due LUN destruction date, notifies a user of an approaching LUN destruction date, and destroys any past-due LUNs.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: April 24, 2018
    Assignee: DELL PRODUCTS, L.P.
    Inventor: Parind Shah
  • Patent number: 9952794
    Abstract: A storage device or storage system includes a transient compression layer that is established based on a level of finishedness of the capacity of the storage device or storage system. Data may be compressed and written to the transient compression layer until the capacity is sufficiently finished, after which the compressed data may be destaged and written to the capacity. The transient compression layer may be established on a hard disc media of the storage system or in a SSD of the storage system.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: April 24, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Andrew Michael Kowles