Patents Examined by Qing Chen
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Patent number: 12730742Abstract: An apparatus, method, and system comprising: a quantum computer that is configured to execute a parametric quantum circuit a plurality of times, the parametric quantum circuit comprising: a qubit with an unknown quantum state at an initial cycle of the parametric quantum circuit, an ansatz parametric circuit for receiving the unknown quantum state and outputting a processed quantum state, and a detection sub-circuit for indicating a distance measure of the processed quantum state from a target state, wherein said quantum computer implements a Variational Quantum Algorithm (VQA) scheme to iteratively set parameter values of the ansatz parametric circuit until obtaining a parameter value that causes the parametric quantum circuit to output an approximation of zero; and an output module for outputting the ansatz parametric circuit.Type: GrantFiled: April 3, 2024Date of Patent: September 8, 2026Assignee: Classiq Technologies LTD.Inventors: Amir Naveh, Shmuel Ur, Nir Minerbi, Ofek Kirzner, Lior Gazit
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Patent number: 12724694Abstract: A method for testing a computer program. The method includes executing the computer program until a memory enable command is called for a memory region previously allocated by a memory allocation command of the computer program; skipping the memory enable command, and setting, for each of one or more memory locations of the memory region that is to be enabled by the memory enable command, a relevant watchpoint to the memory location of the memory region; and displaying, for each set watchpoint, that the computer program has a bug if the set watchpoint is triggered.Type: GrantFiled: May 15, 2024Date of Patent: September 1, 2026Assignee: Robert Bosch GmbHInventors: Christopher Huth, Max Camillo Eisele
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Patent number: 12724594Abstract: Systems or techniques are provided for facilitating desktop-to-cloud application migration. In various embodiments, a system can access a desktop application. In various aspects, the system can deploy the desktop application in a cloud computing environment, based on generating a nested model-view-presenter software architecture that treats the desktop application as an outer data model. In various instances, the cloud computing environment can comprise a server device and a client device, wherein the server device can host the desktop application and a portion of an outer presenter, and wherein the client device can host another portion of the outer presenter and an outer view. In various cases, the outer view can comprise an inner view, an inner presenter, and a lite version of the desktop application.Type: GrantFiled: February 22, 2024Date of Patent: September 1, 2026Assignee: FEI S.A.S.Inventors: Quentin Lavigne, Rémi Louis Oukrat
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Patent number: 12717564Abstract: A method for determining a binary function entry includes distinguishing a text section and an exception handling section by parsing a binary code, disassembling the text section to determine an address of an end branch instruction, an address of a direct call target, and an address of a direct jump target, determining an indirect return function call address from the addresses of the end branch instructions, determining an exception handling block address from the addresses of the end branch instructions, excluding the indirect return function call address and the exception handling block address from the addresses of the end branch instructions and determining a tail call corresponding to the binary function entry from the addresses of the direct jump targets.Type: GrantFiled: July 27, 2023Date of Patent: August 25, 2026Assignee: Korea Advanced Institute of Science and TechnologyInventors: Sang Kil Cha, Hyungseok Kim, Junoh Lee, Soomin Kim
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Patent number: 12699563Abstract: A system can be provided for to evaluating artificial intelligence (AI) generated structure language files. For example, the system can receive a first structured language file generated by a large language model (LLM). The first structured language file can include generated keys and generated values for a resource. The system can also receive a second structured language file, which can include test keys and test values for the resource. The system can further extract, using a schema for the resource, resource keys. The system can determine, based on a comparison of the generated keys and the resource keys, a valid key total. Similarly, the system can determine, based on a comparison of the generated values and the test values, a valid value total. The system can then generate performance metrics for the LLM. Each performance metric can depend on the valid key total or the valid value total.Type: GrantFiled: February 22, 2024Date of Patent: August 4, 2026Assignee: Red Hat, Inc.Inventors: William J. Caban Babilonia, Erik M. Jacobs, Guarav Singh, Benjamin Michael Parees
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Patent number: 12693851Abstract: Robotic process automation (RPA) bot flows may be modified in the event the RPA bot flows fail to successfully complete. The RPA bot flows may be modified based on user inputs, or the RPA bot flows may be modified based on similarities to other RPA bot flows that may include similar operations. In some embodiments determinations as to similarities to other RPA bot flows are made using a neural network. In some embodiments determinations as to similarities to other RPA bot flows are made using image analysis.Type: GrantFiled: October 27, 2023Date of Patent: July 28, 2026Assignee: Cerby, Inc.Inventors: Belsasar Lepe, Vidal Gonzalez, Carlos Arturo Ortiz Anaya, David Rangel
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Patent number: 12688027Abstract: Disclosed is an automated method and system for upgrading an automation function controlling an actuator via a PLC (programmable logic controller), including: providing a first container and a first sidecar container, whereby the first container contains a first automation function, the first automation function is controlling the actuator via the PLC, providing a second container and a second sidecar container, whereby the second container contains a second automation function, the second automation function is receiving data from the actuator but is not controlling the actuator, based on the received data pre-activation tests for the second automation function are executed in the second sidecar container by the second test unit, if the pre-activation tests are successfully finished, the time when the control of the actuator is handed over is determined, and the control of the actuator is handed over from the first automation function to the second automation function.Type: GrantFiled: September 11, 2023Date of Patent: July 21, 2026Assignee: Siemens AktiengesellschaftInventors: Steffen Klepke, Christoph Stückjürgen
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Patent number: 12670089Abstract: A method and system are disclosed for testing functionality of a software program based on at least one modification to a software code of the software program. In one embodiment, the method includes: receiving software code of software program from one or more sources; identifying functions within the software code of the software program affected by the modification of software code; simulating the identified functions of the software program using digital twin; determining workflows of the software program based on the simulation of digital twin; identifying at least one impacted workflow from determined workflows based on one or more requirements of software program; and executing at least one impacted workflow critical to the functionality of the software program for testing the functionality of software program.Type: GrantFiled: August 30, 2021Date of Patent: June 30, 2026Assignee: Siemens Medical Solutions USA, Inc.Inventors: Keith Andress, Saurav Daga, Murali Tharan Gnanamani, Tasheer Hussain B, Sandesh Naik
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Patent number: 12663972Abstract: Provided are a compiling device, a compiling method, and a compiling program with which the speed of a program can be increased when a loop in a program includes an access to adjacent data. The compiling device includes: a loop analysis unit for determining whether vectorization of a loop in a source program is possible when an access to adjacent data is included in the loop; and a vectorization execution unit for generating an instruction for reading elements required for computation from a memory to a vector register when access to the adjacent data is included and the vectorization of the loop is possible.Type: GrantFiled: November 17, 2021Date of Patent: June 23, 2026Assignee: NEC CORPORATIONInventor: Kento Iwakawa
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Patent number: 12663978Abstract: Techniques for program code management are disclosed. For example, a method obtains resource utilization data from a computing network comprising a plurality of computing devices. The method then utilizes a multi-variate time series model representing at least a portion of the resource utilization data to automatically compute at least one time window in which to perform a program code update on at least a subset of the plurality of computing devices.Type: GrantFiled: June 29, 2023Date of Patent: June 23, 2026Assignee: Dell Products L.P.Inventors: Ramesh Doddaiah, Udgith A. Mankad, Theodore R. Grevers, Suresh K. Krishnan
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Patent number: 12663981Abstract: The technologies described herein provide a system having nonvolatile firmware memory that is configured on the same integrated circuit as a BMC SoC. This design provides the ability to store the system firmware within the SoC to minimize or eliminate the use of complex components or specialized silicon, while minimizing the number of attack points. The disclosed techniques also improve the performance of a system by eliminating the need for a system to perform a validation of contents stored on an external memory device for each boot. Further, the disclosed techniques can allow a storage device that is internal to the SoC to use a local bus of the SoC, and mitigate or eliminate the need for an SPI bus, which is much slower than the local bus of the BMC SoC.Type: GrantFiled: April 15, 2024Date of Patent: June 23, 2026Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLCInventors: Satheesh Thomas, David Wise, Balaji Nagalingam Rajendiran
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Patent number: 12663970Abstract: An apparatus to facilitate data parallel programming task graph optimization through device telemetry is disclosed. The apparatus includes a processor to: receive, from a compiler, compiled code generated from source code of an application, the compiled code to support a workload of the application; generate a task graph of the application using the compiled code, the task graph to represent at least one of a relationship or dependency of the compiled code; receive runtime telemetry data corresponding to execution of the compiled code on the one or more accelerator devices; identify one or more scheduling optimizations for the one or more accelerator devices based on the task graph and the received telemetry data; and provide a scheduling command to cause the one or more scheduling optimizations to be implemented in the one or more accelerator devices.Type: GrantFiled: March 11, 2022Date of Patent: June 23, 2026Assignee: INTEL CORPORATIONInventors: Michael Kinsner, Ben J. Ashbaugh, James Brodman, Rajesh Poornachandran
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Patent number: 12650915Abstract: A method includes: acquiring a hook point and a virtual program counter by analyzing a virtual machine of a script engine; acquiring a branch virtual machine instruction by analyzing an instruction set architecture; and providing an analysis function to the script engine based on the acquired virtual program counter and the acquired branch virtual machine instruction, wherein the analysis function is provided by applying a hook to the acquired hook point and wherein the hook includes processing of, in response to an occurrence of an exception, changing a pointing destination of a virtual stack pointer to a return destination of a function immediately before a part where the exception has occurred.Type: GrantFiled: October 18, 2021Date of Patent: June 9, 2026Assignee: NTT, Inc.Inventors: Toshinori Usui, Tomonori Ikuse, Yuhei Kawakoya, Makoto Iwamura
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Patent number: 12645451Abstract: In one embodiment, a method includes receiving information associated with a plurality of devices. The information includes a manufacturer, a model name, and a current version of software for each of the plurality of devices. The method also includes generating a plurality of classifications. Each of the plurality of classifications is associated with a particular manufacturer and a particular model name. The method further includes determining a number of the plurality of devices in a first classification of the plurality of classifications, categorizing the number of the plurality of devices in the first classification into a plurality of categories by the current version of software, and determining, independent of any type of device identifier, a latest available version of software for the first classification.Type: GrantFiled: December 5, 2022Date of Patent: June 2, 2026Assignee: Cisco Technology, Inc.Inventor: Robert Jacob Linial Small
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Patent number: 12639055Abstract: Compiler techniques lot inline parallelism and re-targetable parallel runtime execution of logic iterators enables selection thereof from the source code or dynamically during the object code execution.Type: GrantFiled: December 10, 2018Date of Patent: May 26, 2026Assignee: NVIDIA CorporationInventors: Vinod Grover, Thibaut Lutz
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Patent number: 12619408Abstract: A method for pipeline parallelism compiling is provided, which is executed by one or more processors, and includes receiving a source program associated with training of a machine learning model, determining, based on the source program, a plurality of operation groups including operations executed on training data of the machine learning model, generating a plurality of micro-batches from the training data, and determining, for each of the plurality of micro-batches, a plurality of operation sets corresponding to the plurality of operation groups.Type: GrantFiled: January 30, 2024Date of Patent: May 5, 2026Assignee: MOREH CORP.Inventors: Gangwon Jo, Jungho Park
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Patent number: 12591416Abstract: An AI tool for writing computer code is generated by collecting code entry data from a plurality of remote computing devices, training a code completion network using the code entry data, wherein the code completion network is configured to predict one or more additional code entry activities based on a provided set of code entry activities, and providing the code completion network to one or more development sessions. A code segment is intelligently generated by receiving a request to modify computer code of a program in a development interface, and presenting a text input component and a code description prompt. The technique further includes receiving, via the text input component, a code description, applying at least part of the code description to a code generation network to obtain a code segment suggestion and presenting the code segment suggestion on a display.Type: GrantFiled: March 7, 2024Date of Patent: March 31, 2026Assignee: Replit, Inc.Inventors: Amjad Masad, Reza Shabani, Samip Dahal
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Patent number: 12591415Abstract: An AI tool for writing computer code is generated by collecting code entry data from a plurality of remote computing devices, training a code completion network using the code entry data, wherein the code completion network is configured to predict one or more additional code entry activities based on a provided set of code entry activities, and providing the code completion network to one or more development sessions. A code segment is intelligently generated by receiving a request to modify computer code of a program in a development interface, and presenting a text input component and a code description prompt. The technique further includes receiving, via the text input component, a code description, applying at least part of the code description to a code generation network to obtain a code segment suggestion and presenting the code segment suggestion on a display.Type: GrantFiled: March 7, 2024Date of Patent: March 31, 2026Assignee: Replit, Inc.Inventors: Amjad Masad, Reza Shabani, Samip Dahal
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Patent number: 12585460Abstract: Provided is a program and computer-implemented method of obfuscating a software code, comprising adding a conditional branch instruction to the software code which, when executed, causes evaluating an opaque predicate (PT, PF, P?). The method comprises a step of generating the opaque predicate which includes performing a multiplication operation having as operands two mixed Boolean-arithmetic expressions. Other embodiments disclosed.Type: GrantFiled: January 25, 2022Date of Patent: March 24, 2026Assignee: THALES DIS CPL USA, Inc.Inventors: Roman Rohleder, Peter Garba
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Patent number: 12572351Abstract: Various embodiments described herein support or provide operations including receiving input data that comprises a collection of data units; determining that the collection of data units corresponds to a number of tokens that exceeds an upper limit of tokens; processing the collection of data units to generate a plurality of outputs; and aggregating the plurality of outputs into a final result provided as output of a function.Type: GrantFiled: July 31, 2023Date of Patent: March 10, 2026Assignee: Discover Beagle, Inc.Inventors: Artur Chakhvadze, Maksim Ivanov