Abstract: A latch-type sense amplifier receives a low level differential small swing input signal pair. The amplifier includes a pair of MOSFET switches of a first conductivity type each having a first source/drain terminal coupled to one of the input signal lines. The latch has a second pair of MOSFETs of the first conductivity type with its first source/drain terminal connected to the second source/drain terminal of one of the first pair of MOSFETs. Each of the second pair of MOSFETs has its first source/drain terminal connected to the first source/drain terminal of a third pair of MOSFETs of the second conductivity type. Each MOSFET of the second conductivity type has its second source/drain terminal connected to a first voltage source. The gate terminals of the second pair of MOSFETs are connected together to receive a control signal. The gate terminals of each of the third pair of MOSFETs are cross-coupled and connected to the second source/drain terminals of the first pair of MOSFETs.

Abstract: Multiplexers are used to generate synchronized slave clocks from a common master clock. A first multiplexer and a second multiplexer generate a first slave clock and a second slave clock, respectively, from the common master clock. A third multiplexer and a fourth multiplexer are configured as a divide-by-n circuit for providing a third slave clock that is a divided version of the second slave clock. A fifth multiplexer provides a matching delay to preserve the synchronization between the first slave clock and the other slave clocks. A sixth multiplexer is used to select between the second slave clock and the third slave clock in response to a select signal. A flip-flop may be used to provide the select signal and to guard against false selection of slave clocks.