Abstract: This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically to both dual and single inverse copper damascene processes to form conducting copper interconnects and contact vias simultaneously, with low dielectric constant intermetal dielectrics (IMD). The low dielectric constant material, low-K, can be of four types of material: doped oxide, organic materials, highly fluorinated films, porous materials. In addition, spin-on glass (SOG) and spin-on-dielectric (SOD) are applicable. Key to the present invention are the following process steps, that have exceptionally advanced process controls: polysilicon etching of sacrificial polysilicon, plasma ashing of the patterning photoresist, and post cleaning.