Patents Examined by Ray Potter
  • Patent number: 5903045
    Abstract: A semiconductor structure includes a stack of two semiconductor chips. An edge of the chips forms a side surface of the stack. Insulation and adhesive is located between the chips, and a wire contacting circuitry on one of the chips extends through the insulation to the side surface. A first conductor contacts the wire on the side surface. The first conductor is self-aligned to the wire and extends above the side surface. The first conductor facilitates pads or connectors on the side surface that are insulated from the semiconductor chips. The self-aligned first conductor is an electroplated or electroless plated metal.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: May 11, 1999
    Assignee: International Business Machines Corporation
    Inventors: Claude L. Bertin, Thomas G. Ference, Wayne J. Howell
  • Patent number: 5072278
    Abstract: The monolithic integrated structure comprises a semiconductor substrate, a superimposed first epitaxial stratum having characteristics such as to withstand a high supply voltage applied to the driving system and a first and a second isolation pocket which may be connected to a high voltage and to ground, respectively, and diffused in said first epitaxial stratum at a distance such as to define an interposed area of said first stratum capable of isolating said isolating pockets from one another. Within the latter pockets, there are provided respective embedded strata and superimposed regions of a second epitaxial stratum having characteristics such as to withstand the low voltage applied across the two driving stages. A further region of said second epitaxial stratum is superimposed over said area of said first epitaxial stratum.
    Type: Grant
    Filed: February 14, 1990
    Date of Patent: December 10, 1991
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Mario Paparo, Sergio Palara