Abstract: The present invention is a method of writing data to a storage system using a redundant array of independent/inexpensive disks ("RAID") organization that eliminates the write hole problem of regenerating undetected corrupt data. The invention also overcomes the need for system overhead to synchronize data writes to logical block numbers that map to the same parity block. A log is constructed and used for storing information relating to requested updates or write operations to the data blocks in the multiple disk array. A separate entry is made in the log for each parity block that must be updated as a result of the write operation. Each log entry contains the addresses of the logical block numbers to which data must be written for that operation. After the new data is written to data blocks in the RAID array, a background scrubber operation sequentially reads the next available entry in the log and performs a parity calculation to determine the parity resulting from the write operation.

Abstract: A multiple user data storage, retrieval and distribution system containing a parallel processing computer system that forms a digital information server. The server contains a plurality of parallel processors each connected to a information storage device. The user data is stored in a distributed manner amongst the information storage devices. The distribution system dynamically allocates the users to the system based upon the user's requested operating mode. As such, during successive user service periods, all the users are supplied their requested data. The system also provides error detection and correction for the data requested by the users. Furthermore, additional data can be added to the information storage devices during each service period and select information storage devices can be recalibrated without affecting system operation.

Abstract: An object oriented database data acquisition device having a housing with at least one substantially planar surface and a video screen positioned thereon. The device includes a digitizer positioned substantially coextensively under the video screen and a pen having a power source for activating the digitizer. Means for controlling the data acquisition device includes controllers comprising a first microprocessor, a second microprocessor connected to said digitizer and first processor for scanning the digitizer, a third microprocessor connected to said video screen for controlling screen images, a power manager connected to the first processor, the power manager including a power source and controller, program storage, and a program stored in the program storage for controlling the microprocessors.

Abstract: A data processing system is provided for executing multimedia applications which interface with multimedia end devices that consume or produce at least one of (a) real-time and (b) asynchronous streamed data. The data processing system includes a central processing unit for data processing operations including execution of the multimedia application, a digital signal processor for processing data including the streamed data, and a plurality of modular components which cooperate to provide a substantially open architecture.

Abstract: Requests are routed between components in a parallel computing system using multiple-phase combining. In the first phase, the original requests are decomposed into groups of requests that share the same destination address. The requests in each group are combined at an intermediate component into a single request per group. In subsequent phases, the combined requests are themselves grouped and combined in intermediate components. In the final phase, the combined requests are processed by the component containing the destination address. The addresses of the intermediate components are determined in part by hashing on the destination address and in part by a distributing function. The hashed portion of the intermediate component address tends to converge the combined requests toward the destination component during each phase. The distributing portion of the intermediate component address tends to distribute the workload evenly among the components.

Abstract: In a system having a plurality of sources for generating tasks and a plurality of receivers for receiving said tasks wherein a plurality of said tasks for one or more said receivers may be generated at the same time by one or more of said sources, each said receiver having a unique address within said system, an apparatus comprising a storage means for storing said tasks generated by said sources; an address means for generating, in each system cycle, the address of one of said receivers; and priority means connected to said address means and said storage means for establishing priority among the tasks for the receiver whose address is being generated by said address means and for generating a signal indicating which said task has priority, where said priority is established as a function of said selected tasks location in said storage means and the sequence that said selected tasks were stored in said storage means.

Abstract: A multimedia information capturing apparatus consisting of a hand writing stylus pen and a data processing unit including a write and display tablet operating with the stylus pen. By means of the stylus pen, image and voice data are captured, memorized and transmitted to the data processing unit through a wireless data transmission route, and in the data processing unit, the image and voice data are displayed and sounded on the tablet and from a speaker respectively and text data on the image and voice data is made by operating the stylus pen with the tablet. The data on the captured image and voice and the text data are stored in the data processing unit, and the data stored in the data processing unit can be transfer to the stylus pen through the wireless transmission route and stored in the stylus pen.

Abstract: A number of data compression and decompression server processes and a socket interface to which these server processes can be attached are provided to each computer system of a network. Additionally, an OPEN, a WRITE, and a READ routine are provided to the operating system of each computer system of the network. The OPEN routine is used by a client sender process to establish connection to a client receiver process computer system. In the course of establishing the connection, the OPEN routine automatically negotiate a compression/decompression method between the sender and the receiver computer system. The WRITE routine is used by the client sender process to send data to the client process. In the course of sending the data, the WRITE routine automatically invokes the appropriate compression method to compress the data based on the result of the negotiation performed by the OPEN routine. The READ routine is used by the client receiver process to receive data from the sender process.

Abstract: A method and system for synchronizing execution by a processing element of threads within a process. Before execution of a thread commences, a determination is made as to whether all of the required resources for execution of the thread are available in a cache local to the processing element. If the resources are not available, then the resources are fetched from main storage and stored in one or more local caches before execution begins. If the resources are available, then execution of the thread may begin. During execution of the thread and, in particular, an instruction within the thread, the instruction may require data in order to successfully complete its execution. When this occurs, a determination is made as to whether the necessary data is available. If the data is available, the result of the instruction execution is stored and execution of the thread continues. However, if the data is unavailable, then the thread is deferred until the data becomes available and a new thread is processed.

Abstract: A transaction managing system is described in which transaction commands must be routed to appropriate resource managers. The transaction managing system first determines the identity of the target resource from the transactions commands, and compares this with all the resources that it knows it manages itself. If the target resource is managed by the transaction processing system itself, then the transaction command is passed to a resource manager within the transaction managing system itself. If the transaction managing system does not recognize the resource then it sends a query message to each external resource manager to determine if any of these recognize the resource. If one of the external resource managers send an ownership message back to the transactions managing system admitting ownership of the target resource then the transaction command is passed to that external resource manager for processing.

Abstract: A system for connecting a plurality of input/output (I/O) channels to a single computer system bus. A system controller establishes priority among the I/O channels competing for access to the system bus. A plurality of I/O channel bridges are connected to the system bus and interface with EISA channels. The I/O bridges receive data from the EISA channels at one data rate and transmit the data to the system bus at another data rate. Data is stored within the I/O bridges in a cache memory device until commanded to transmit the data to the system bus by the system controller.

Abstract: A distributed system includes a non-distributed computing environment (DCE) computer system and at least one DCE computer system which are loosely coupled together through a communications network operating with a standard communications protocol. The non-DCE and DCE computer systems operate under the control of proprietary and UNIX based operating systems respectively. The non-DCE computer system further includes application client software for providing access to distributed DCE service components via a remote procedure call (RPC) mechanism obtained through application server software included on the DCE computer system.

Abstract: A method and apparatus is provided for use in an asynchronous bus interface capable of multiple or single width transfers and controlled by handshake signals, in which the bus transaction may include multiple successive data transfers delineated by a data strobe, and in which each data transfer is terminated by a data handshake signal, and in which data transfers for different cycle types incur different propagation delays, including bus buffering apparatus for directing transfers over single and multiple width busses, and an asynchronous bus controller for returning data handshake signals with individualized timing characteristics in response to the master data strobe and the cycle type of the transaction, such that each successive data transfer is completed in the minimum time that propagation delays, as indicated by the cycle type, will allow, in order to maximize bus throughput.

Abstract: In a token train retrieval device including a memory device (24) for memorizing a plurality of tokens each of which starts at a starting address and ends at an end address and each of which has a nest level selected from a plurality of nest levels and comprises a header and a data set where header comprises a data length code and a data identifier code including a nest bit, a retrieval condition memory (25) memorizes a retrieval condition including a plurality of designated nest level codes and a plurality of designated identifier codes. A header register (26) holds the data length code, the data identifier code, and the nest bit as a held data length code, a held data identifier code, and a held nest bit. Responsive to the held data length code, a supplied header, and a decided nest level code, a checking circuit (27) produces a matching signal when the retrieval condition is satisfied.

Abstract: A multi-CPU programmable controller which operates to access one of a plurality of I/O interface units through a common I/O bus for controlling one of a plurality of equipments each connected to each associated one of the I/O interface units. The programmable controller includes a pair of controllers, each of the pair including an individual CPU for generating an access signal for selectively accessing one of said I/O interface units through the common I/O bus for control thereof within one bus cycle. Each of the pair of controllers operates in accordance with a specific program independently from each other. The programmable controller further includes a base board for mounting controllers together with the common I/O bus as well as the I/O interface units: bus arbitrating device, provided on the base board, for generating a single sampling clock.

Abstract: A destination field of a data packet to be processed by a data driven type processor includes a field for storing a processor number for specifying a processor by which the data packet is to be processed and a field for storing a node number for addressing a memory space wherein a data flow program to be executed us stored. In a case of structuring one system by coupling a plurality of such data driven type processors, a minimum bit width of the above-described processor number field is determined according to the number of data driven type processors and all fields but the processor number field of the destination field are allotted to the above-described node number field.

Abstract: A method for reducing the number of I/O requests required to write data to a disk drive of a computer system. The computer system includes a read cache for storing old data read from the disk drive, and a write cache for storing new data to be written to the disk drive. The method selectively merges old data in the read cache with new data in the write cache to form at most two physically contiguous data segments which can be written to the disk drive with at most two I/O requests.

Abstract: In a digital data transfer system whereby a plurality of driver units are all connected to and share the same common system bus, there is provided control gating logic which will prevent the enablement of a subsequent driver for a fixed delay time until it is certain that the previous driver has been shut down. Due to switching time variations in driving units, a fixed delay time is set to function in a first driver that is beginning its data transmission to be sure that another driver which was previously transmitting data has been completely turned-off before the first driver gains access to the commonly shared bus. This ensures that no two drivers can simultaneously be driving data onto the system bus at the same time which would obviate the integrity of data transmitted.

Abstract: An object-oriented, hierarchical model of a computer network layered communications subsystem is implemented in a configuration database subsystem to create and maintain a configuration database and to provide configuration data to the layered communications subsystem. The layered communications subsystem is represented by a set of defined object classes, each object class corresponding to one or more functions defined at each of the communications subsystem layers, the object classes being related in a hierarchical relationship which preserves the functional relationship among the various functions in the various layers making up the layered communications subsystem.