Abstract: A device (e.g., a secondary cache device) manages descriptors which correspond to storage locations (e.g., cache blocks). The device includes memory and a control circuit coupled to the memory. The control circuit is configured to arrange the descriptors, which correspond to the storage locations, into multiple queues within the memory based on storage location access frequencies. The control circuit is further configured to determine whether an expiration timer for the particular descriptor has expired in response to a particular descriptor reaching a head of a particular queue. The control circuit is further configured to move the particular descriptor from the head of the particular queue to a different part of the multiple queues, wherein the different part is identified based on access frequency when the expiration timer for the particular descriptor has not expired, and not based on access frequency when the expiration timer for the particular descriptor has expired.

Abstract: An event generating and delivering system in a computer system has an output portion for outputting an output data as a result of process by an application program, a storage portion preliminarily storing output data designated for producing events among the output data as matching conditions, a recognition judgement portion for inputting output data output in the output means, reading out the matching condition from the storage means, making judgement whether the output data read out is matched with the matching condition or not and outputting the result of judgement, an event generating and delivering means for generating a predetermined event corresponding to the output data when matching is judged by the recognition judgement means, and a monitor application program for receiving the generated event and executing a preliminarily defined process content corresponding to the event.

Abstract: The present invention is directed to a method of resolving protocol addresses using new protocols. Gateways that map ATMARP packets to NHRP packets are placed in the network to make translations between the two protocols. Therefore the installed base of networks can be maintained, with added functionality. Techniques for handling those areas where the two protocols do not match directly such as sub-address fields, purge packets and holding time expiration are also disclosed.

Abstract: A method for operating a disk storage system, comprising a disk and forming part of a communications network, simultaneously maintains the continuity of a plurality of data streams. Typically, each stream transfers video data to or from the disk storage system. Illustratively, each of the data streams is produced in the network at a rate of W.sub.base bits/sec and consumed by the disk storage system or produced by said disk storage system and consumed in the network at a rate of W.sub.base bits/sec. One I/O transaction is performed for each stream in each of a plurality of I/O cycles of duration S/W.sub.base, wherein in each I/O transaction a segment of S bits is retrieved from or stored in the disk. The number of streams whose continuity can be maintained in this manner is limited by the number of I/O's which can be performed in a cycle of duration S/W.sub.base. More generally, when a stream has a bit rate (A/B)W.sub.

Abstract: A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

Abstract: A method optimizes routing in a multiprocessor computer system by defining two types of virtual channels having virtual channel buffers for storing messages communicated between processing element nodes in the multiprocessor computer system. A dateline is associated to each type of virtual channel, and messages are restrained from crossing a dateline on its associated type of virtual channel to avoid deadlock. A cost function is defined which is correlated to imbalances in the utilization of the two types of virtual channels. The unrestrained messages are allocated between the two types of virtual channels to minimize the cost function by defining an initial virtual channel allocation, randomly modifying the virtual channel allocation, and accepting the random modification if the modification decreases the cost function, else accepting the modification based on a probability that slowly decreases during the allocating step.