Patents Examined by Remmon R. Forde?
  • Patent number: 6858878
    Abstract: A light shield film is provided adjacent to an anode of an EL element that consists of the anode, an EL layer, and a cathode. The anode and the cathode are transparent or semitransparent to visible light and hence transmit EL light. With this structure, ambient light is absorbed by the light shield film and does not reach an observer. This prevents an external view from appearing on the observation surface.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: February 22, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6759692
    Abstract: A gate driver includes a gate control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch and a first sub-circuit having a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: July 6, 2004
    Assignee: IXYS Corporation
    Inventor: Sam Seiichiro Ochi
  • Patent number: 6737719
    Abstract: An image sensor is disclosed that has a concave micro-lens structure. The image sensor includes a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a base material having a first index of refraction is formed over the pixels. Micro-lens cavities are formed in the base material over the light sensitive elements, the micro-lens cavity having a concave shape. Finally, color filters are formed into the micro-lens cavities, the color filters having a second index of refraction that is higher than the first index of refraction.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: May 18, 2004
    Assignee: OmniVision International Holding Ltd
    Inventor: Katsumi Yamamoto
  • Patent number: 6727515
    Abstract: Porous insulation films 28, 40, 50 are formed of an insulation forming material including a silicon compound having a skeleton containing C—C bonds, a pore forming compound which is decomposed or evaporated by a heat treatment, and a solvent which dissolves the silicon compound with the pore forming compound, whereby the porous insulation film can have good mechanical strength and low dielectric constant.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: April 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Katsumi Suzuki, Iwao Sugiura, Ei Yano
  • Patent number: 6707099
    Abstract: A semiconductor device less susceptible to inverse narrow channel effect and its manufacturing method are provided. A silicon nitride film (13) is adopted as element isolation regions; the silicon nitride film (13) has a smaller etch rate than a sacrificial silicon oxide film (7) which serves as a sacrificial layer during ion implantation (8). This prevents formation of recesses in the silicon nitride film (13) during the removal of the sacrificial silicon oxide film (7), which weakens the strength of the electric fields at the gate edges. Weakening the strength of the electric fields at the gate edges suppresses the inverse narrow channel effect, so that the MOS transistor offers a characteristic closer to a characteristic in which the threshold voltage keeps a constant value independently of the channel width. Thus an MOS transistor having a good characteristic can be manufactured.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: March 16, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Katsuomi Shiozawa, Takashi Kuroi, Katsuyuki Horita
  • Patent number: 6621143
    Abstract: A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also formed over the front side surface. In one embodiment, the second electrode is connected by a metal-filled via to a layer of conductive material on the back side of the substrate. In alternative embodiments, the via is omitted and the second electrode is either in electrical contact with the substrate or is formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor can be provided by a pair of oppositely-directed diodes formed in the substrate and connected in parallel with the capacitor.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: September 16, 2003
    Assignee: Vishay Intertechnology, Inc
    Inventors: Haim Goldberger, Sik Lui, Jacek Korec, Y. Mohammed Kasem, Harianto Wong, Jack Van Den Heuvel
  • Patent number: 6573537
    Abstract: An inverted III-nitride light-emitting device (LED) with highly reflective ohmic contacts includes n- and p-electrode metallizations that are opaque, highly reflective, and provide excellent current spreading. The n- and p-electrodes each absorb less than 25% of incident light per pass at the peak emission wavelength of the LED active region.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: June 3, 2003
    Assignee: Lumileds Lighting, U.S., LLC
    Inventors: Daniel A. Steigerwald, Steven D. Lester, Jonathan J. Wierer, Jr.
  • Patent number: 6479840
    Abstract: Disclosed is an inventive diode which can reduce a stray capacity to improve various characteristics thereof, in which a dielectric layer, a conductive layer and a second dielectric layer are respectively formed by deposition in this order on an upper face of a semiconductor substrate excluding a central portion of an exposed surface of a P-type region. Then, an anode side electrode is formed extending from the exposed surface of the P-type region to the upper face of the second dielectric layer, and is electrically connected with the P-type region. Herein, the conductive layer is formed such that it is isolated from the electrode by the second dielectric layer, is connected with the semiconductor substrate upper face in a location where the dielectric layer has not been formed, and partially resides in a location sandwiched between the electrode and the semiconductor substrate.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: November 12, 2002
    Assignee: Toko, Inc.
    Inventors: Takeshi Kasahara, Shinichi Shigematsu
  • Patent number: 6441475
    Abstract: This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: August 27, 2002
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Felix Zandman, Y. Mohammed Kasem, Yueh-Se Ho
  • Patent number: 6373076
    Abstract: Semiconductor power devices with improved electrical characteristics are disclosed including rectifying contacts on a specially prepared semiconductor surface with little or no additional exposure to other chemical treatments, with oxide passivation and edge termination at a face of the semiconductor substrate adjacent to and surrounding the power device. The edge termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize a portion of the substrate face and preferably self-aligned to the device. The passivated, edge-terminated devices exhibit improved characteristics relative to passivated devices with characteristics approaching those of the native semiconductor with the additional advantages of passivation protection. Methods for making and using the devices are also disclosed.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: April 16, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Dev Alok, Emil Arnold
  • Patent number: 6329671
    Abstract: A semiconductor wafer is prepared which includes a semiconductor layer having on its surface a plurality of functional devices, and a separation line region surrounding and separating the plurality of functional devices from one another. A metal layer is formed on the surface of separation line region of semiconductor region. A reinforcing layer is formed on the surface of semiconductor wafer. By selectively etching the back surface of semiconductor layer, a hole is formed to surround the peripheries of functional device, passing through semiconductor layer and reaching from the back surface to metal layer. Reinforcing plate is removed from semiconductor wafer. Metal layer is irradiated with laser and fused to provide a plurality of semiconductor chips separated from one another.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: December 11, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masahiro Tamaki, Kazuo Hayashi, Shozui Takeno
  • Patent number: 6323533
    Abstract: A semiconductor device (1) with an operating frequency above 50 MHz comprises a body (2) composed of a soft ferrite material, which body (2) has a surface (3) to which a semiconductor element (4), a pattern of conductors (5,6) and a passive element in the form of a planar inductor (7) are fastened by means of a layer (8) of adhesive. In order to reduce the manufacturing costs of the semiconductor device without adversely affecting the performance of the semiconductor device performance, a soft ferrite material is applied having a ferromagnetic resonance frequency smaller than the operating frequency of the semiconductor device.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: November 27, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Pieter Jan Van Der Zaag, Ronald Dekker, Wilhelmus Mathias Clemens Dolmans
  • Patent number: 6207986
    Abstract: A semiconductor integrated circuit device offering a phase pattern makeup that excludes mixture of insular and linear patterns in a mask for forming a single wire electrode layer so as to eliminate inconsistency in the Levenson arrangement of phase shifters. A plurality of wire electrodes are spaced a minimum size apart and are in different phases. Between two adjacent wire electrodes are plug electrodes each formed with an upper and a lower layer plug electrode in direct contact, with no intervention of wire electrodes and without the presence of an insular pattern made of the same wire electrode layer. This setup allows the Levenson arrangement to take shape for enhanced pattern density, whereby a semiconductor integrated circuit device of a high degree of integration is implemented.
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: March 27, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Yamanaka, Shin'ichiro Kimura, Hideyuki Matsuoka, Takeshi Sakata, Tomonori Sekiguchi
  • Patent number: 6185392
    Abstract: The present invention is featured that a developing apparatus has an elastic member provided on a side of a leakage preventing member which is supported by a developing container, and that the elastic member is provided so as to overlap an overlapping portion between the leakage preventing member and a developer regulating member on an end portion in a lengthwise direction of the developing container.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: February 6, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Nobuharu Hoshi
  • Patent number: 6137974
    Abstract: A tensioning system that precisely sets and monitors tension in a photoreceptor belt and includes a stepper motor that is actuated by a controller to apply pressure to the photoreceptor belt through a roll over which the belt is mounted. A load cell is positioned with respect to a piston actuator to sense the pressure applied by the piston actuator against the photoreceptor belt and signals the controller which in turn actuates the stepper motor to bring the tension on the belt to a predetermined set amount.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: October 24, 2000
    Assignee: Xerox Corporation
    Inventors: Ernest B. Williams, Mark W. Horobin
  • Patent number: 6112040
    Abstract: An ozone-exhaust duct is incorporated in an electrophotographic printer to exhaust air, containing ozone and dust articles, and an exit structure of the duct is associated with an ozone-filter. In the exit-structure, a dust trapper is provided under an exit end portion of the duct near the ozone-filter to define a dust-trapping chamber such that a cross-sectional area of the exit end portion of the duct is increased in comparison with a cross-sectional area of a remaining portion of the duct, whereby a velocity of the air, introduced from the remaining portion of the duct into the exit end portion thereof, slows down, due to the existence of the ozone-filter and the increased cross-sectional area of the exit end portion of the duct, resulting in trapping of a part of the dust particles, contained in the introduced air, in the dust-trapping chamber of the dust trapper due to gravity.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: August 29, 2000
    Assignee: Asahi Kogaku Kogyo Kabushiki Kaisha
    Inventors: Hiroyuki Saito, Kasumi Yamamoto
  • Patent number: 6091917
    Abstract: An image forming apparatus includes a photosensitive drum, a charger detachably mountable with respect to a main body of the image forming apparatus and having a charging wire, a wire electrode for receiving a voltage to be supplied to the charging wire, a grid, and a grid electrode for receiving a voltage to be supplied to the grid, a wire power-feeding contact arranged to come into contact with the wire electrode, and a grid power-feeding contact arranged to come into contact with the grid electrode, wherein, in mounting the charger in the image forming apparatus, the wire electrode comes into contact with the wire power-feeding contact after the grid electrode comes into contact with the grid power-feeding contact.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: July 18, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuaki Aoki
  • Patent number: 6085062
    Abstract: An electrophotographic image forming apparatus is disclosed which is provided within a cleaning device with a rotative conveying member for conveying a residual toner after removal thereof from a photoreceptor up to an inlet of a toner dropping path while rotating. Within the toner dropping path is disposed a toner bridge preventing member for preventing the formation of a toner bridge in the same path. The toner bridge preventing member is driven by the rotative conveying member so as to reciprocate substantially in parallel with the toner dropping direction.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: July 4, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Haruji Mizuishi, Ken Amemiya, Hiroshi Mizusawa, Hiroyuki Ohkaji, Mayumi Ohori, Masaru Tanaka, Hideki Zenba, Kenzou Tatsumi
  • Patent number: 6064846
    Abstract: A developer container having a spiral groove around the periphery, a developer supply hole at one end, two protruding positioning strips raised from the periphery at two opposite sides of the developer supply holes an annular flange at an opposite end for enabling the developer container to be put on a flat surface in vertical, two opposed notches formed on the annular flange, and two toothed blocks respectively suspended in the notches for engagement with respective toothed blocks at a driving shaft in an electrophotographic image forming apparatus for synchronous rotation with the driving shaft.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: May 16, 2000
    Assignee: General Plastic Industrial Co., Ltd.
    Inventors: Jui-Chi Wang, Robin Hsu, Ya-Li Huang, Kuan-Tung Li
  • Patent number: 6061536
    Abstract: An air circulation system for a liquid-type electrophotographic printer. The air circulation system circulates air in the printer and discharges the air to the outside. The printer includes a developer unit for developing a predetermined image onto a photoreceptor belt, a drying unit for drying the developed image, and a transfer unit for printing the dried image on a paper.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: May 9, 2000
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Min-su Cho, Kwang-ho No