Patents Examined by Rene{acute over (e)} R. Berry
  • Patent number: 6180506
    Abstract: A multi-film damascene metal interconnect line for a semiconductor device and the method for manufacturing the interconnect line. The interconnect line has a redundant layer film included within the top surface of the interconnect line which reduces stress voiding and electromigration. The interconnect line is produced by depositing a redundant film part-way through the deposition of the bulk metal film and does not require additional polishing steps.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corporation
    Inventor: Timothy D. Sullivan
  • Patent number: 6174812
    Abstract: A copper-palladium alloy damascene technology applied to the ultra large scale integration (ULSI) circuits fabrication is disclosed. First, a TaN barrier is deposited over an oxide layer or in terms of the inter metal dielectric (IMD) layer. Then a copper-palladium seed is deposited over the TaN barrier. Furthermore, a copper-palladium gap-fill electroplating layer is electroplated over the dielectric oxide layer. Second, a copper-palladium annealing process is carried out. Then the copper-palladium electroplating surface is planarized by means of a chemical mechanical polishing (CMP) process. Third, the CoWP cap is self-aligned to the planarized copper-palladium alloy surface. Finally, a second IMD layer is deposited over the first IMD layer. Furthermore, a contact hole in the second dielectric layer over said CoWP cap layer is formed, and then the CoWP cap of the first IMD layer is connected with the copper-palladium alloy bottom surface of the second IMD layer directly.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: January 16, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Chiung-Sheng Hsiung, Wen-Yi Hsieh, Water Lur
  • Patent number: 6174823
    Abstract: This invention relates to methods of forming a barrier layer including depositing a layer of Titanium Nitride and subsequently nitriding the surface of that layer. In some embodiments the Titanium Nitride layer is exposed to Oxygen prior to the nitroding step.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: January 16, 2001
    Assignee: Trikon Equipments Limited
    Inventors: Christopher David Dobson, Mark Graeme Martin Harris, Keith Edward Buchanan
  • Patent number: 6171961
    Abstract: To form a wiring electrode having excellent contact function, in covering a contact hole formed in an insulating film, a film of a wiring material comprising aluminum or including aluminum as a major component is firstly formed and on top of the film, a film having an element belonging to 12 through 15 groups as a major component is formed and by carrying out a heating treatment at 400° C. for 0.5 through 2 hr in an atmosphere including hydrogen, the wiring material is provided with fluidity and firm contact is realized.
    Type: Grant
    Filed: November 6, 1997
    Date of Patent: January 9, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Kunihiko Fukuchi
  • Patent number: 6171958
    Abstract: A process for preparing a diffusion barrier on a semiconductor substrate which comprises: conducting remote plasma-enhanced metal organic chemical vapor deposition of a thin film of TiNx on said substrate using an organotitanium compound under a flow of H2 plasma, wherein x ranges from 0.1 to 1.5, provides a TiNx thin film having a low carbon content and low specific resistivity.
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: January 9, 2001
    Assignee: Postech Foundation (KR)
    Inventors: Shi Woo Rhee, Ju Young Yun
  • Patent number: 6171949
    Abstract: A method for manufacturing an integrated circuit using damascene processes is provided in which conductive material surfaces subject to chemical-mechanical polishing are passivated after polishing with a dry, low energy, ion implantation passivating process to prevent oxidation and to eliminate a high dielectric constant protective layer. In particular, copper conductive material is subject to nitrogen implantation at or below 100 KeV to produce a protective copper nitride.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: January 9, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Lu You, Shekhar Pramanick