Patents Examined by Ricahrd A. Booth
  • Patent number: 8222050
    Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: July 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
  • Patent number: 6200836
    Abstract: A new method is provided for the formation of Lightly Doped Drain (LDD) regions in MOS devices. The body of the gate electrode is formed including the self-aligned LDD regions. After the LDD regions have been formed, an oxide implant is performed under an angle into the surface of the substrate on which the MOS device is being formed. This oxide implant forms an oxide layer around the interface between the source/drain regions and the surrounding silicon. The spacers for the gate electrode are formed, the source/drain region implant is completed. This implanted oxygen junction is subjected to a thermal treatment thereby forming an oxide layer around the source/drain regions. This oxide layer eliminates the leakage current across the interface between the source/drain regions and the surrounding silicon further forcing the saturation current between these regions to flow along the surface of the silicon substrate.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: March 13, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Chue-San Yoo