Patents Examined by Rita Ziemer
  • Patent number: 6347382
    Abstract: A multi-port device analysis apparatus for analyzing the characteristic of a multi-port device having three or more input-output terminals. The multi-port device analysis apparatus is configured such that a test signal is sent from one port and an input signal is received by the other port. The apparatus includes a network analyzer for analyzing the characteristic of the multi-port device under test in vector values and a multi-port test set is connected to the ports of the network analyzer for converting the ports of the network analyzer to three or more ports. The multi-port device under test is connected to the multi-port test set without using a balance-unbalance converter to analyze the characteristic data of the device in vector values.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: February 12, 2002
    Assignee: Advantest Corp.
    Inventors: Yoshikazu Nakayama, Norihide Abiko
  • Patent number: 6327671
    Abstract: A data storage facility provides a remote copy operation that copies data write updates from a primary data store to a remote site by identifying which bytes in a block update have changed and sending only the changed bytes from the primary data store to the remote site. An exclusive-OR (XOR) logic operation is used to identify the changed bytes by XOR'ing the original data block with the changed block. Data compression can then be used on the XOR data block to delete the unchanged bytes, and when the compressed block is sent to the remote site, only the unchanged bytes will be sent, thereby reducing the bandwidth needed between the primary store and the remote site.
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: December 4, 2001
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar Moothedath Menon
  • Patent number: 6314526
    Abstract: A cluster system is treated as a set of resource groups, each resource group including a highly available application and the resources upon which it depends. A resource group may have between 2 and M data processing systems, where M is small relative to the cluster size N of the total cluster. Configuration and status information for the resource group is fully replicated only on those data processing systems which are members of the resource group. In the event of failure of a data processing system within the cluster, only resource groups including the failed data processing system are affected. Each resource group having a quorum of its data processing systems available continues to provide services, allowing many applications within the cluster to continue functioning while the cluster is restored.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: November 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: James W. Arendt, Ching-Yun Chao, Rodolfo Ausgusto Mancisidor
  • Patent number: 6311268
    Abstract: A computer module removably coupled to a console for outputting video data, includes a host interface controller coupled to receive a console configuration signal from the console, a graphics accelerator, a television signal encoder coupled to the graphics accelerator for receiving video data and for outputting television signals, and a central processing unit coupled to the host interface controller, to the graphics accelerator, and to the television signal encoder, for processing the console configuration signal and for enabling the television signal encoder to output the television signals to the console.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: October 30, 2001
    Assignee: Acqis Technology, Inc.
    Inventor: William W. Y. Chu
  • Patent number: 6311293
    Abstract: Efficient formal verification of a system model is obtained by performing a state reachability analysis of an unrestricted full system model that includes constraints selected by the tester for testing a given property, followed by an analysis that permits a reduction in the complexity of the tested system's model. The analysis involves determining variables of the system's model that do not change value in the course of the state reachability analysis, often because of the constraints imposed prior to performing the reachability analysis. The unchanging variables are replaced with constants, and those constants are propagated through the system model to simplify the state transition relations that define the system. The simplified system model is then applied to a verification tool to determine whether the liveness property is satisfied.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: October 30, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Robert Paul Kurshan, Carlos Manuel Roman
  • Patent number: 6304984
    Abstract: A host bridge having a plurality of pre-defined registers used for injecting errors to a selected device so that other devices are not affected and normal systems operations can continue is disclosed. In accordance with the method and system of the present invention, device select lines from each device are brought into the host bridge individually for determining if an error is to be injected to a selected device. First, a register or a bit in a register in the host bridge is matched against an incoming bus operation for the type of bus operation, a load or a store, to inject the error upon. Next, a register having an initial or random value within the host bridge indicates which occurrence of the operation to inject the error. If the value of the register indicates that an error is to be injected, the load or store operation is delayed by forcing zero byte enables until the device identifier of the selected device may be checked against a device register within the host bridge.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: October 16, 2001
    Assignee: International Business Machines Corporation
    Inventors: Danny Marvin Neal, Steven Mark Thurber
  • Patent number: 6292909
    Abstract: Apparatus for monitoring and testing a transaction system, and controlled by enterprise automation equipment. The testing apparatus is programmed with various MIB structures to provide probe points and signals to the transaction system. Responses are received by the test apparatus via check points connected to the transaction system. The test apparatus applies test signals to the probe points in a manner similar to signals applied by users of the transaction system. The responses received from the transaction system are again similar to the responses received by the user in the normal utilization of the transaction system.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: September 18, 2001
    Inventor: Duncan Hare
  • Patent number: 6275931
    Abstract: A system for loading upgraded, that is, new boot code and/or main firm ware has a programmable memory that has two boot code regions. One of the regions holds the active boot code while the other region holds the inactive boot code. During a boot code upgrade, the boot code in the inactive region, is under control of the boot code in the active region, replaced with the new boot code. Once the replacement process is verified as having been successful and the vector table in the new boot code is copied to the processor vector table in the memory, the processor can be reset so that the new boot code becomes the active boot code and the previously active boot code becomes the inactive boot code.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: August 14, 2001
    Assignee: Elsag International N.V.
    Inventors: Shanthala Narayanaswamy, Richard J. Molnar, Michael J. Wozniak
  • Patent number: 6269441
    Abstract: The present invention refers to a logo display device for a computer and the method thereof which allows a user to optionally select and display a logo image of a system's basic input output system (BIOS). The present invention comprises: an image exchange tool for changing numerous graphic images made by a user into logo images, respectively; a storage medium for storing the numerous logo images changed by means of the image exchange tool; a basic input output system read only memory (BIOS ROM) for storing default logo images; a logo image selection unit for enabling a user to optionally select a logo image among the logo images stored in the read only memory (ROM) and the storage medium; and a display unit for displaying the logo image selected optionally by the user.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: July 31, 2001
    Assignee: SamSung Electronics Co., Ltd.
    Inventors: Gwang-Soo Lee, Hyun-Kook Lee
  • Patent number: 6266782
    Abstract: Apparatus and methods for correcting protocol errors in computer networking software. More particularly, an apparatus and methods are provided for correcting a class of protocol errors that is compatible with the protocol suite being used in computer networking software. The present invention performs inband protocol correction in a single phase or in multiple phases, according to some specific embodiments.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: July 24, 2001
    Assignee: Siemens Information and Communication Networks, Inc.
    Inventors: George E. Carter, Shmuel Shaffer
  • Patent number: 6266770
    Abstract: A method of autonomously configuring peer devices without unnecessary delay in boot up time using a compatibility bridge. Upon initiating a configuration cycle, the compatibility bridge monitors the status of the configuration cycle on the host bus. The compatibility bridge determines whether and when to forward the configuration cycle to another bus, e.g., a PCI bus. The method records the presence or absence of a particular device by setting a respective bit in a scorecard register and scorecard valid register.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: July 24, 2001
    Assignee: Micron Technology, Inc.
    Inventor: A. Kent Porterfield
  • Patent number: 6266778
    Abstract: A synchronous bus system that enables the bus lengths between devices to be extended such that the timing budget is more than one clock cycle. A reset process resets the transmission and reception circuitry and both circuitry function according to prespecified parameters relative to the deassertion of the reset signal such that the amount of logic required to latch and sample the data is minimized. As the timing budget is not limited to one clock cycle, devices can be spaced further apart providing more physical space for devices. Furthermore, skew sensitivity is reduced as the skew is distributed over multiple clock periods.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: July 24, 2001
    Assignee: Intel Corporation
    Inventor: D. Michael Bell
  • Patent number: 6256548
    Abstract: The present invention discloses a method for controlling lots' dispatch of tool groups, and all the lots can be transferred to correct places for further processing. The lots are transferred to the storage places of the tool when there is only a single tool for the next process. A decision step is performed for deciding whether the storage places of the next tool group and the next-next tool group overlap when the next process contains a tool group. If there are overlapped storage places, then the lots will be moved to the overlapped storage place having minimum loading. When there is no overlapped storage place, the lots will be dispatched to the storage place having minimum loading among the next tool group. All the lots can be processed with at minimum moving steps, and all the tools perform their processes under balance loading whenever the productions increase or decrease.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: July 3, 2001
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Li-Ren Lin
  • Patent number: 6256732
    Abstract: Described is a computer system which can automatically provide its capabilities to a main computer without powering on to facilitate configuring the system in its shipping package. The computer system is coupled to a remote computer via a data communication link. The system includes a communication subsystem which is supplied with auxiliary power and is operative to detect when a valid communication link is established between the computer system and the main computer. After the detection the communication subsystem sends a first packet to the main computer via the communication subsystem. The first packet includes data which specifically identifies the computer system. When the communication link is coupled to the communication subsystem through the packaging and a power source is coupled to a power connector of the system through the packaging, the system is operative to send the first packet without powering on.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Daryl Carvis Cromer, Brandon J. Ellison, Christopher Brit Gould, Gregory William Kilmer, David Rhoades, James Peter Ward
  • Patent number: 6247140
    Abstract: A technique for remotely administering one or more nodes of a distributed data processing system to provide mirroring of operating system images, and/or designating of alternate volume groups for the one or more nodes. A new data class is defined in a system data repository (SDR) coupled to a control node of the distributed system. A set of commands are provided to initiate and discontinue mirroring from the control node on a nodal volume group, along with designating alternate volume groups for remote installation on one or more nodes of the system in parallel. An interface to add, delete, modify or display information about nodal volume groups is also provided.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Chase-Salerno, Richard Ferri
  • Patent number: 6243809
    Abstract: A computer system provides for flashing a non-volatile memory image to a non-volatile memory and reading data from a non-volatile memory independently of an operating system. An image buffer is allocated in a volatile memory of the computer system. If flashing a non-volatile memory image to the non-volatile memory is desired, the image buffer is loaded with a portion of the non-volatile memory image. BIOS interface code is then called to place an SMI event code into a memory and to generate a system management interrupt causing the computer system to enter a system management mode. SMI handler code examines the SMI event code and calls SMI service code. Next, the image buffer is located and the portion of the non-volatile memory in the image buffer is flashed to the non-volatile memory by the SMI service code. Locating the image buffer may include locating an image header defined within the volatile memory. The image header may include a password for providing access to the non-volatile memory.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: June 5, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Patrick L. Gibbons, Paul J. Broyles, III
  • Patent number: 6243828
    Abstract: A system for remotely administering one or more nodes of a distributed data processing system to provide mirroring of operating system images, and/or designating of alternate volume groups for the one or more nodes. A new data class is defined in a system data repository (SDR) coupled to a control node of the distributed system. A set of commands are provided to initiate and discontinue mirroring from the control node on a nodal volume group, along with designating alternate volume groups for remote installation on one or more nodes of the system in parallel. An interface to add, delete, modify or display information about nodal volume groups is also provided.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: June 5, 2001
    Assignee: International Business Machines Corp.
    Inventors: Michael S. Chase-Salerno, Richard Ferri
  • Patent number: 6237113
    Abstract: A method of initializing a control unit connected to a diagnostic bus by a trigger word using signals on the diagnostic bus over the RXD line of a microcontroller having a port register and a receive buffer register. According to this method, information is sampled from the port register for the low/high logic state with a predetermined sampling cycle to detect the trigger word, and a readout of the receive buffer register and an analysis of the status information are performed. To prevent unintentional initialization or triggering of the control unit, a check at the sampling time during input of the trigger word is performed to determine whether the receive buffer register is full or whether there is a transition from the high logic signal level to the low logic signal level on the K line of the diagnostic bus, in which case a trigger word causes a framing error in this test.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: May 22, 2001
    Assignee: Robert Bosch GmbH
    Inventor: Martin Daiber
  • Patent number: 6226761
    Abstract: The operating system or memory management mechanism for a lean client or network computer, or any other data processing system, employs a garbage collection memory management model in which live references to an object are periodically surveyed and disconnected storage is deallocated when no live references to object(s) contained within that storage remain. System dumps taken at the time of a failure or fatal error may include such disconnected data storage which was not garbage-collected prior to the system failure. The presence of such extra data increases the size of the dump, complicates searches through the dump, and potentially results in false search hits if apparently pertinent data is found within disconnected storage. To eliminate the extra data and facilitate debugging, a dump formatter or dump tool automatically performs a post-dump garbage collection, filtering the dump file in a manner similar to garbage collection on the original running system.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventor: Viktor Berstis
  • Patent number: 6226694
    Abstract: A system and method synchronizes multiple data stores and achieves data consistency in a non-transactional multiprocessing computer system. Processes are paused and later resumed according to their position in a dependency tree of the system. The data input sources of the system are in effect disabled and any data flow currently in progress in the system is flushed out the various data flow paths to the different data stores. When this process is complete, each of the multiple data stores is synchronized and the data is in a consistent state.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: May 1, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Steven J. Constant, Toni Atkinson, Stephen C. Booth, James R. Greuel, Paul H. Price, Robert D. Schettler, Darren D. Smith, John T. Ward