Patents Examined by Robert Craddock
  • Patent number: 7737986
    Abstract: The present disclosure describes methods and systems for tiling video or still image data. At least some preferred embodiments include a method for accessing data that includes partitioning a display of graphical data into a plurality of two-dimensional tiles; mapping a two-dimensional tile of the plurality of two-dimensional tiles to a single memory row within a memory; and maintaining the graphical data for the two-dimensional tile in the single memory row.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Franck Seigneret, Sylvain Dubois, Jean Pierre Noel, Pierre-Yves J. Taloud
  • Patent number: 7737983
    Abstract: A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: June 15, 2010
    Assignee: Via Technologies, Inc.
    Inventors: John Brothers, Timour Paltashev, Hsilin Huang, Boris Prokopenko, Qunfeng (Fred) Liao
  • Patent number: 7724255
    Abstract: A program for generating an image, the program causing a computer to function as: an object space setting section which sets an object in an object space; a vertex processing section which performs per-vertex processing; and a pixel processing section which performs per-pixel processing, wherein, when subjecting an object of a first group to predetermined processing which is implemented by a first processing and a second processing, the vertex processing section performs the first processing with a processing load lower than a processing load of the second processing, and the pixel processing section performs the second processing; and wherein, when subjecting an object of a second group differing from the first group to the predetermined processing which is implemented by a third processing and a fourth processing, the vertex processing section performs the third processing with a processing load higher than a processing load of the fourth processing, and the pixel processing section performs the fourth proc
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: May 25, 2010
    Assignee: Namco Bandai Games Inc.
    Inventor: Takashi Imagire
  • Patent number: 7710419
    Abstract: An image generation system including a vertex processing section and a pixel processing section. When subjecting an object which is distant from a virtual camera to predetermined processing which is implemented by a first processing and a second processing, the vertex processing section performs the first processing with a processing load lower than a processing load of the second processing, and the pixel processing section performs the second processing. When subjecting an object which is close to the virtual camera to the predetermined processing which is implemented by a third processing and a fourth processing, the vertex processing section performs the third processing with a processing load higher than a processing load of the fourth processing, and the pixel processing section performs the fourth processing.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: May 4, 2010
    Assignee: Namco Bandai Games Inc.
    Inventor: Takashi Imagire
  • Patent number: 7679621
    Abstract: An object recognition apparatus in an embodiment includes an image input unit, an object detection unit, a diffuse reflection image generation unit, an object model storage unit, a difference image generation unit, a weight calculation unit, a weighted Gaussian filter application unit, a filter processing unit, and an identification unit. A weight to be assigned to a weighted Gaussian filter is determined in view of variations in lighting conditions and reflection components of pixels of an input image.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: March 16, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masashi Nishiyama, Osamu Yamaguchi
  • Patent number: 7663627
    Abstract: A graphic drawing apparatus for drawing a graphic representation in which a plurality of evaluation objects are drawn by lines connecting scores with respect to a plurality of evaluation items executes a drawing-position adjusting to adjust drawing positions for each of the evaluation items where the scores of the evaluation objects are plotted with respect to each of the evaluation items so that the drawing positions do not overlap each other according to the scores of the evaluation objects with respect to an evaluation item.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: February 16, 2010
    Assignee: Fujitsu Limited
    Inventor: Masayuki Iguchi
  • Patent number: 7652671
    Abstract: An image processing device including a storage section, a parallel processing controller, a sequential processing controller, and a selection section which selectively operates the two control sections. The parallel processing controller connects one or more of the image processing modules such that first buffer modules are connected at least one of preceding and following each image processing module, to formulate a first image processing section, and controls such that individual image processing modules perform image processing in parallel with one another. The first buffer modules perform exclusive access control. The sequential processing controller connects one or more of the image processing modules such that second buffer modules are connected at least one of preceding and following each image processing module, to formulate a second image processing section, and controls such that the individual image processing modules perform image processing sequentially.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 26, 2010
    Assignees: Fuji Xerox Co., Ltd., Fujifilm Corporation
    Inventors: Takashi Nagao, Yukio Kumazawa, Youichi Isaka, Takashi Igarashi, Yusuke Sugimoto, Kazuyuki Itagaki, Junichi Kaneko