Abstract: The present invention is accomplished by first initializing a plurality of individuals. A trie is constructed for each individual, where the trie represents the original data. The trie comprises a root node, a plurality of sub-nodes and sub-arrays in a hierarchical arrangement. The individual indicates the number of the sub-nodes, sub-arrays and number of entries in each sub-array. Within a trie, delete any sub-array which contains redundant data and remove any of sub-node which contains redundant data. Apply an overlapping reduction function to the trie. With the trie constructed, determine the size for the trie and associate the size to the individual. Select a mating population based on trie size. Choose and perform at least one operation for the mating population, where the operation is the operations of crossover or mutation. For crossover, create at least one new individual by recombining the "genes" of at least two individual from the mating population.

Abstract: A mechanism for filtering production rules which express conditions to be satisfied, identifies during successive inference cycles rules whose conditions are satisfied for deduced facts. The mechanism includes a sorting system for ordering the conditions of the rules according to a sorting criterion in order to verify the conditions of the rules on the basis of an order in which the conditions are to be applied. The sorting mechanism activates the system for sorting the conditions of the rules only if the number of facts satisfying a rule condition is multiplied or divided by a variable factor between the current inference cycle and the last preceding inference cycle during which the sorting system was activated for that rule.

Abstract: A semiconductor neural network includes a coupling matrix having coupling elements arranged in a matrix which couple with specific coupling strengths internal data input lines to internal data output lines. The internal data output lines are divided into groups. The neural network further comprises weighting addition circuits provided corresponding to the groups of the internal data output lines. A weighting addition circuit includes weighing elements for adding weights to signals on the internal data output lines in the corresponding group and outputting the weighted signals, and an addition circuit for outputting a total sum of the outputs of those weighting elements.

Abstract: A decoder circuit based on the concept of a neural network architecture has a unique configuration using a connection structure having CMOS inverters, and PMOS and NMOS bias and synapse transistors. The decoder circuit consists of M parallel inverter input circuit corresponding to an M-bit digital signal and forming an input neuron group, a 2.sup.M parallel inverter output circuit corresponding to 2.sup.M decoded outputs and forming an output neuron group, and a synapse group connected between the input neuron group and the output neuron group responsive to a bias group and the M-bit digital original for providing a decoded output signal to one of the 2.sup.M outputs of the output neuron group when a match is detected. Hence, only one of the 2.sup.M outputs will be active at any one time.

Abstract: Realization of a reconfigurable neuron for use in a neural network has been achieved using analog techniques. In the reconfigurable neuron, digital input data are multiplied by programmable digital weights in a novel connection structure whose output permits straightforward summation of the products thereby forming a sum signal. The sum signal is multiplied by a programmable scalar, in general, 1, when the input data and the digital weights are binary. When the digital input data and the digital weights are multilevel, the scalar in each reconfigurable neuron is programmed to be a fraction which corresponds to the bit position in the digital data representation, that is, a programmable scalar of 1/2, 1/4, 1/8, and so on. The signal formed by scalar multiplication is passed through a programmable build out circuit which permits neural network reconfiguration by interconnection of one neuron to one or more other neurons.