Abstract: The present invention provides a functional block that executes video coding and video decoding based on H.264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: A method, device and system for stably issuing a rights object (RO) to a memory, namely, an SRM, via a terminal. When RO has been issued to the memory card, namely, to the SRM, by using the stable procedure, the RO can be compatible with a different terminal that does not support the stable procedure, whereby the RO can be completely used by the different terminal.

Abstract: A system and method for processing uncompressed high definition video data to be transmitted over a wireless medium is disclosed. In one embodiment, the system includes i) a plurality of convolutional encoders configured to input a plurality of video data streams and output a plurality of encoded data streams, respectively, wherein each data stream includes a plurality of data bits, ii) a group multiplexer configured to multiplex the plurality of encoded data streams into a multiplexed data stream, wherein the group multiplexer is further configured to multiplex a plurality of data bits together at one time and iii) a circulant bit interleaver configured to receive an m×n data stream block having n columns and m rows or convert the multiplexed data stream to an m×n data stream block, wherein the m×n data stream block comprises m×n data bits, and wherein the bit interleaver is further configured to interleave the received data bits diagonally and in a circulant manner with respect to the m×n block.

Abstract: A system, comprising an external memory operative to store data therein, the data including a plurality of sections, each of the sections being associated with a signature, and an internal memory operationally connected to the external memory, and a processor arrangement operationally connected to the internal memory, the processor arrangement including a transfer module to transfer one section from the external to the internal memory, an authentication module to authenticate the signature of the section transferred from the external memory, a validity status module to identify the section as valid if the signature is authentic, and an execution module to utilize the section of the data only if the section is valid, wherein the validity status module is operative to invalidate the section, if the content of the section is changed while stored in the internal memory. Related apparatus and methods are also described.

Abstract: In extended Feistel type common key block cipher processing, a configuration is realized in which an encryption function and a decryption function are commonly used. In a cryptographic processing configuration to which an extended Feistel structure in which the number of data lines d is set to an integer satisfying d?3 is applied, involution properties, that is, the application of a common function to encryption processing and decryption processing, can be achieved. With a configuration in which round keys are permuted or F-functions are permuted in the decryption processing, processing using a common function can be performed by setting swap functions for the encryption processing and the decryption processing to have the same processing style.

Abstract: Techniques are provided to obfuscate seed values to produce a decryption key for a simplified content protection scheme. A first repeatable sequence is performed that encrypts a value stored in a first memory location using a value stored in the second memory location to produce an encrypted value and the value stored in the first memory location is overwritten with the encrypted value and then applying a constraining function to the value stored in the second memory location to produce a result and the value stored in the second memory location is overwritten with the result, wherein the result contains a less entropy compared an entropy level of the value in the second memory location prior to applying the constraining function. This sequence is repeated, but the values used in the first and second memory locations are used in opposite fashion. Techniques are also provided to perform the reverse operation and de-obfuscate a decryption key.

Abstract: A cryptographic processing apparatus for performing arithmetic operation on an FL function and an FL?1 function in a cryptographic process includes a first arithmetic gate is configured to receive a first input bit string and a first extended key bit string, a first XOR gate configured to receive an output of the first arithmetic gate and a second input bit string, a second arithmetic gate configured to receive an output of the first XOR gate and a second extended key bit string, a second XOR gate configured to receive an output of the second arithmetic gate and the first input bit string, a third arithmetic gate configured to receive an output of the second XOR gate and the first extended key bit string, and a third XOR gate configured to receive an output of the third arithmetic gate and an output of the first XOR gate.