Abstract: In a vehicle network for controlling electronic devices of the type having a network driver with at least one output line connected to the network through a common mode choke. A circuit for improving the immunity of the network includes a resistor and a capacitor connected in series between the signal output line and ground. The series resistor and capacitor protect the network from communication errors.
Abstract: The present disclosure relates to variable-gain low noise amplifiers and RF receivers. An exemplary method for processing a RF signal provides a low noise amplifier with main and auxiliary amplifier modules. When a selection indicates the low noise amplifier operating in a high-gain mode, the main and auxiliary amplifier modules are coupled in parallel. When the selection indicates the low noise amplifier operating in a low-gain mode, the main and auxiliary amplifier modules are cross coupled. When a selection indicates the low noise amplifier operating in a moderate-gain mode, the auxiliary amplifier modules are disconnected from the main amplifier module.
Abstract: An exemplary communication device includes a combiner having a first transmission line configured to be coupled with a first communication component. A second transmission line is configured to be coupled with a second communication component. A third transmission line is coupled with the first and second transmission lines. An isolation module is coupled with the first and second transmission lines. The isolation module has a resistance, a capacitance and an inductance configured to isolate the first communication component from the second communication component if one of the components is inoperative. The isolation module components are also configured to provide RF matching for the first and second transmission lines if one of the components is inoperative.
Abstract: Switching error in an auto-zero offset amplifier is reduced by keeping a clock level to the auto-zero switches at an amplitude just enough to insure complete switching of the switches of the auto-zero offset buffer amplifier. A level shifting circuit provides the clock at the desired level control and a local voltage regulator provides a regulated voltage to the level shifting circuit.
Abstract: An apparatus comprising a first power combiner/divider network and a second power combiner/divider network. The first power combiner/divider network splits a first electromagnetic signal into split signals that are connectable to signal processor(s). The second power combiner/divider network combines processed signals into a second electromagnetic signal. The apparatus includes a three-dimensional coaxial microstructure.
Type:
Grant
Filed:
July 5, 2011
Date of Patent:
April 15, 2014
Assignee:
Nuvotronics, LLC
Inventors:
David Sherrer, Jean-Marc Rollin, Kenneth Vanhille, Marcus Oliver, Steve Huettner
Abstract: A power amplification circuit having three modes of operation and a single switch is disclosed. Only one switch is used to control three different load impedance levels, one load impedance level for each mode of operation. The remaining “switching” results from selectively biasing each power amplification path by turning ON or OFF amplifiers. A series L-C and a switch are used to control the load impedance. Additional modes of operation may also be created without requiring any additional switch. Further, multiple modes of operation may be implemented using no switches.
Abstract: A current-sensing differential amplifier has a balanced input. Thus, a balanced-input current-sensing differential amplifier has a first signal input terminal, a second signal input terminal, a first signal output terminal and a second signal output terminal. The balanced-input current-sensing differential amplifier includes a first current mirror, the input terminal of the first current mirror being coupled to the first signal input terminal, a second current mirror, the input terminal of the second current mirror being coupled to the second signal input terminal, a third current mirror, one of the output terminals of the third current mirror being coupled to the common terminal of the first current mirror and to the common terminal of the second current mirror, three current sources and an output circuit.
Abstract: An apparatus and method for outputting high-frequency, high-power signals from low-frequency, low-power input is disclosed. The apparatus and method may provide a two-dimensional nonlinear lattice having a plurality of inductors and voltage-dependent capacitors intersecting at a plurality of nodes. Two or more adjacent boundaries of the nonlinear lattice may be provided with input signals which constructively interfere to output a signal of substantially higher amplitude and higher frequency than those of the input signals.
Abstract: A waveguide for transmission of data signals therealong. Data signals are typically received from and/or transmitted to a remote location and subsequently passed to or emitted from the apparatus which allows the data to be processed. The waveguide includes a channel which has a cross-sectional shape, the angular orientation of which is changed at least one point along the length of the same so as to provide a waveguide which is less sensitive to interferences. The waveguide, in one embodiment, can also include recessed portions and/or ridges along the length of the channel which ensures that the waveguide can be formed in a more reliable and controlled manner.
Abstract: A Class-D amplifier arrangement is disclosed that implements an auxiliary feedback loop and a primary feedback loop. The auxiliary feedback loop operates upon an input signal when the Class-D amplifier arrangement is operating under a power-up condition and a power-down condition so that a modulated signal is confined within the auxiliary feedback loop during the power-up condition and the power-down condition. The confinement of the modulated signal within the auxiliary feedback loop during the power-up condition and the power-down condition diverts transient signals coupled onto the modulated signal from an output device. The primary feedback loop operates upon the input signal when the Class-D amplifier arrangement is operating under a normal condition so that the modulated signal is introduced to the output device during the normal condition.
Abstract: A reconfigurable network arrangement of resistors and switches is constructed so that it can be coupled to one or more operational amplifiers and selectively programmed so as to set the gain of the resulting amplifier. The configuration of the network arrangement of resistors and switches to include resistors that can be connected in the feedback path in series and in parallel with each other is such as to provide a wider selection of gain settings, without the need to increase the physical area of the switches on a integrated circuit arrangement.
Abstract: A programmable transversal structure that may serve as a filter, or more generally, a transversal network. A pair of time delay elements are implemented using one or more grating control propagation path structures, multilayer waveguides with configurable gaps, or variable impedance meander lines. Electro active actuators responsive to bandwidth, center frequency, and stop band attenuation control inputs control the delay of such elements. Impedance elements are distributed between the time delay elements to provide the desired transversal response.
Type:
Grant
Filed:
March 27, 2012
Date of Patent:
March 25, 2014
Assignee:
AMI Research & Development, LLC
Inventors:
John T. Apostolos, Judy Feng, William Mouyos
Abstract: A surface mountable transition block for perpendicular transitions between a microstrip or stripline and a waveguide. The transition block configuration allows for a reduction in the overall cost of a microwave circuit assembly because the circuit board to which the transition block is attached can be an FR-4 type circuit board as opposed to more expensive microwave circuit board materials.
Abstract: A signal transmission device includes: a first substrate and a second substrate; a first resonance section including a first resonator and a second resonator electromagnetically coupled to each other; a second resonance section disposed side-by-side relative to the first resonance section, and electromagnetically coupled to the first resonance section to perform a signal transmission between the first and second resonance sections; and a first shielding electrode disposed between the first resonator and the second substrate and partially covering the first resonator to allow at least an open end of the first resonator to be covered therewith, and a second shielding electrode disposed between the second resonator and the first substrate and partially covering the second resonator to allow at least an open end of the second resonator to be covered therewith.
Abstract: A large scale integrated (LSI) circuit includes a first terminal, a second terminal, a transmitting circuit coupled to the first terminal and the second terminal, and a receiving circuit coupled to the first terminal and the second terminal. The first and second terminals are coupled to an external portion of the large scale integrated circuit. The external portion includes a first branching circuit, a second branching circuit coupled to the first branching circuit, and first and second antennas coupled to the second branching circuit.
Abstract: An apparatus for controlling an amplifier in a communication system includes a first shifter, a generating unit, a second shifter, and a switching bias unit. The first shifter is configured to level-shift a switching voltage of an amplifier to a first voltage. The generating unit is configured to invert the first voltage and output a second voltage. The second shifter is configured to level-shift the second voltage to a third voltage. The switching bias unit is configured to receive the third voltage and output a bias voltage for a gate switching operation of the amplifier to the amplifier.
Type:
Grant
Filed:
January 13, 2011
Date of Patent:
March 11, 2014
Assignee:
Electronics and Telecommunications Research Institute
Abstract: A multi-octave power amplifier and related method provides an impedance matching unit configured to match impedances of a pair of balanced radio frequency (RF) signals applied thereto and output a pair of impedance-matched balanced RF signals, a converting unit configured to convert the pair of the impedance-matched balanced RF signals to an unbalanced RF signal and a compensation unit configured to compensate at least one rolled-off frequency component of the unbalanced RF signal and output a compensated RF signal.
Abstract: The present invention relates to a device for neutralization of a signal obtained by transposition to a high frequency of a useful signal supplied by a unit of equipment, the said equipment having a spurious capacitance Cparasite that varies over time. The device comprises a neutralization capacitance Cneut and means with adjustable gain G, together with means for feedback controlling the gain G in such a manner that, continuously, G×Cneut=Cparasite.
Abstract: A radio-frequency power amplifier with envelope tracking, comprising: a power RF amplifying device for amplifying a RF signal; and a switching DC/DC converter, comprising a switching device and a rectifying device, for providing said power RF amplifying device with a DC power supply at a voltage level proportional to an envelope of said RF signal; wherein said switching device is a RF power transistor; characterized in that said rectifying device, and preferably also said power RF amplifying device, is also a transistor of a same technology, connected as a two-terminal device. Preferably, said power RF amplifying device is also a transistor of said same technology. A low-pass filter can also be provided for reducing the bandwidth of the envelope signal on which the PWM signal driving the DC/DC converter depends.
Type:
Grant
Filed:
September 13, 2011
Date of Patent:
March 11, 2014
Assignee:
Agence Spatiale Europeenne
Inventors:
Nicolas Le Gallou, Christophe Delepaut, David Sardin, Michel Campovecchio
Abstract: Integrated circuits with decoupling capacitor circuitry are provided. Decoupling capacitor circuitry may include multiple arrays of decoupling capacitors. Each decoupling capacitor array may have a corresponding decoupling capacitor monitoring circuit that is associated with that decoupling capacitor array. Each decoupling capacitor monitoring circuit may include a resistor and switching circuitry. Each decoupling capacitor monitoring circuit may be coupled to a comparator and control circuitry. During testing, the control circuitry may configure each decoupling capacitor array for leakage current testing one at a time. If a decoupling capacitor array is determined to exhibit excessive leakage currents, that decoupling capacitor array will be marked as defective and will be disabled from use. If the decoupling capacitor array is determined to exhibit tolerable leakage currents, that decoupling capacitor array will be enable for use to help reduce power supply noise.
Type:
Grant
Filed:
October 21, 2010
Date of Patent:
March 11, 2014
Assignee:
Altera Corporation
Inventors:
Wilson Wong, Allen Chan, Sergey Shumarayev