Abstract: A driving method of a display device is disclosed. According to one aspect, the method includes applying a first voltage of a predetermined level to an anode of a plurality of organic light emitting diodes (OLEDs) included in a plurality of pixels. A plurality of driving transistors are driven to be connected to the plurality of OLEDs. The method further includes transmitting a first power source voltage of a logic high level to the anode of the plurality of OLEDs as a threshold voltage to compensate a threshold voltage of the plurality of driving transistors, and applying a data voltage to a plurality of pixels as a data writing step turning on a plurality of driving transistors. The second power source voltage applied to the cathode of the plurality of OLEDs is changed to a second voltage of the logic low level in a state in which a plurality of driving transistors are turned on. In the turned on state, light is emitted from the plurality of OLEDs.

Abstract: An LCD device includes: an LC panel which exhibits different gamma curves under different view angles, and a display control circuit which divides a single frame period into first and second display periods and divides a display region of the LC panel into first and second regions. The display control circuit has a luminance computing section which computes A to D so that A to D satisfies A+C=B+D and A?B?D as well as C?B?D, where A and C are gray-level luminances, A and B are the white luminances of pixel data displayed in the first and second regions, respectively, during the first display period, and C and D are the white luminances of pixel data displayed in the first and second regions, respectively, during the second display period.

Abstract: An image display terminal includes an image display control unit, a display range setting unit, a display range sending unit and a graph expression receiving unit. The image display control unit displays a background image in a display screen. The display range setting unit sets display range data of a coordinate system to an image display region of the display screen. The display range sending unit sends the display range data to at least one other image display terminal which displays the background image displayed on the image display terminal. After the display range data is set to an image display region of the other image display terminal, the graph expression receiving unit receives, from the other image display terminal, graph expression data for a graph figure displayed on the image display region of the other image display terminal.

Abstract: Aspects of the present invention relate to optical systems in head worn computing.

Abstract: A video-rendering chip performs gain correction on received display input, based on a display temperature, to produce output values that are shown on the display. The video-rendering chip includes multipliers, a microprocessor, and a memory. The microprocessor receives a display temperature from a sensor, determines gain correction coefficients that correspond to the display temperature, and provides the correction coefficients to the multipliers. The multipliers then multiply the display input by the correction coefficients to produce the output values. The microprocessor may determine the correction coefficients utilizing a lookup table or a correction coefficient formula stored in the memory. The microprocessor may receive an updated display temperature periodically and may determine new correction coefficients that correspond to the updated display temperature. The microprocessor may receive updated display temperatures at fixed periods or at varying periods based on the previous display temperature.

Abstract: A display device includes a display unit having a plurality of pixel, a scan driver that sequentially applies scan signals at a first voltage level to the plurality of pixels, a data driver that writes data by applying data signals to the plurality of pixels to correspond to the scan signals at the first voltage level, and a power source controller that supplies a first power source voltage and a second power source voltage to the plurality of pixels. The power source controller maintains the first power source voltage and the second power source voltage at the second voltage level while the data are written, and allows the plurality of pixels to which data are written to emit light by changing the first power source voltage into a third voltage level and the second power source voltage into the first voltage level after writing is complete.

Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.

Abstract: A display apparatus includes a display panel that displays a second image in a 3D mode, a barrier panel that forms a barrier pattern that separates the second image into a left-eye image and a right-eye image, a touch sensing part that includes third electrodes capacitively coupled to a portion of the electrodes included in the barrier panel, and a coordinate calculator. The coordinate calculator measures a variation of capacitance between the portion of the electrodes included in the barrier panel and the third electrodes.

Abstract: A display device includes a plurality of pixels arranged in matrix, a plurality of gate lines, a plurality of data lines, and a gate driver connected to the plurality of gate lines. The gate driver receives a first scan start signal, a second scan start signal and clock signals and outputs a gate-on voltage to each of the plurality of gate lines. The gate driver outputs the gate-on voltage to the plurality of gate lines such that the gate-on voltages do not overlap with each other when the gate driver receives the first scan start signal. The gate driver outputs the gate-on voltage to at least two of the gate lines at substantially the same time when the gate driver receives the second scan start signal.

Abstract: A signal supply circuit supplies, to a control line, a control signal which is set so as to have a precharge potential during a precharge period before start of a writing period and which is set so as to have a gray scale potential corresponding to a designated gray scale of each pixel in a time division manner during the writing period. A plurality of switches controls connection between the signal lines and the control line. A control circuit controls the plurality of switches so as to be concurrently turned on during a precharge period and controls the plurality of switches so as to be turned on sequentially during a plurality of unit periods of the writing period. The control circuit sets an initial unit period after elapse of the precharge period among the plurality of unit periods so as to be longer than the other unit periods.

Abstract: Embodiments of the invention relate generally to computer-based image processing, and more particularly, to systems, computer-readable mediums, methods, and apparatuses to operate a rear modulator in a high dynamic range display to, among other things, characterize input images into pixel characteristics which may be data-reduced representations of a group of pixels corresponding to the input image, and to relate a modulation value intensity image to a weighted combination of the pixel characteristics. The modulation value intensity image may be used to derive a rear modulator drive signal, which, turn, may be configured to control one or more modulating elements to generate a low resolution image of the input image at the rear modulator.

Abstract: A display unit includes: a liquid crystal display section displaying a series of original frame images and a series of interpolated frame images in a time-divisional manner, the interpolated frame images being generated based on the original frame images; a backlight emitting light intermittently; and a backlight control section controlling a first light-emission amount and a second light-emission amount of the backlight independently of each other, the first light-emission amount being an amount during a first period corresponding to a period for displaying the original frame images, and the second light-emission amount being an amount during a second period corresponding to a period for displaying the interpolated frame images.

Abstract: A display includes a backlight source, display panel, first light source, and controller. The display panel includes a sensor array for sensing first reflection light generated from an object reflecting first detection light. The first detection light is generated by the backlight source for locating a coordinate of a projection point of the object on the display panel. The first light source is disposed in a first side of the display panel, for repeatedly transmitting second detection light of different transmitting angles to the object at different time to generate a second reflection light. The second reflection light is sensed by the sensor array. The controller is for performing a corresponding operation according to a transmitting angle of the first light source and the coordinate of the projection point when brightness value of the reflective light is substantially greater than a predict value.

Abstract: The present disclosure provides a driving device for driving a liquid crystal display (LCD) device. The driving device comprises a plurality of first charge sharing switches and a plurality of second charge sharing switches. Each of the plurality of first charge sharing switches is individually coupled between two adjacent odd data channels of a plurality of data channels. Each of the plurality of second charge sharing switches is individually coupled between two adjacent even data channels of the plurality of data channels.

Abstract: A liquid crystal display includes a plurality of pixels, a plurality of data lines connected to the plurality of pixels, and a data driver connected to the plurality of data lines, where the data driver supplies data voltage to the plurality of data lines, where the data driver includes a data latch which outputs input image data in response to image data corresponding to the plurality of pixels, wherein the data latch rearranges a sequence of the image data, and a digital-to-analog converting unit which includes a positive digital-to-analog converter which generates a positive data voltage in response to the input image data, and a negative digital-to-analog converter which generates a negative data voltage in response to the input image data.

Abstract: A pixel and an organic light emitting diode (OLED) display device including the same are disclosed. The pixel includes an organic light emitting diode and an inverse voltage transistor positioned between an anode of the organic light emitting diode and a reverse bias power source, and configured to transmit the inverse voltage to the organic light emitting diode (OLED).

Abstract: A display device includes an insulation substrate; a plurality of gate lines arranged on the insulation substrate in a first direction and including first group of gate lines and second group of gate lines; a plurality of data lines insulated from and crossing the plurality of gate lines; a gate driver applying gate-on voltages to the plurality of gate lines; and a data driver applying data voltages to the plurality of data lines, wherein at least one of the first group of gate lines is arranged between the second group of gate lines and the gate driver applies the gate-on voltages to the first group of gate lines during the first half of a frame and the gate-on voltages to the second group of gate lines during the second half of the frame.

Abstract: A pulse generator that is capable of improving (e.g., increasing) the rising and falling speeds of its pulses. The pulse generator includes a third switch and a first diode serially coupled between a first power source and a data line; a fourth switch and a second diode serially coupled between the data line and a second power source configured to have a voltage lower than that of the first power source; a pulse controller for increasing a voltage of the data line to a voltage higher than that of the first power source or for reducing the voltage of the data line to a voltage lower than that of the second power source; and a first capacitor coupled between the pulse controller and the data line.

Abstract: A device comprising a piezo element includes a piezo-electric material the piezo element including a piezo actuator, and at least one piezo sensor coupled to the piezo actuator, wherein the piezo actuator and the at least one piezo sensor include a common element.

Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.