Patents Examined by Roberto Velez
  • Patent number: 12782409
    Abstract: A new POE & cable tester with BT standard test, including an interface module, a network transformer, a rectifier module, a power management module, and at least one optocoupler detection module, in which the interface module is connected to a primary coil, a secondary coil output end of the network transformer is connected to a line testing module, a center tap of the network transformer is connected to the rectifier module, the power management module is connected to an output end of the rectifier module, the power management module is connected to at least one optocoupler detection module, and the optocoupler detection module is connected to a data end of a central control module. The present disclosure is introduced based on the market demand for testing IEEE 802.3bt standard POE switch, which allows testing IEEE 802.3bt standard POE switch standard, and allows screening of POE switch standard with RJ45/RJ11 connector.
    Type: Grant
    Filed: June 5, 2024
    Date of Patent: November 3, 2026
    Assignee: Shenzhen Noyafa Electronic Co., Ltd.
    Inventors: Haiyan Wu, Ming Lei, Jianping Zhang
  • Patent number: 12782294
    Abstract: An enhanced noninvasive RF analyte detection device in which an enhancement database, an integration module, a transmission module, a sending enhancement module, and a receiving enhancement module are provided. The integration module determines the mode to detect a desired analyte, such as initiating the transmission module, sending enhancement module, and/or receiving enhancement module in a specific sequence. Once the mode is determined, the transmission module may send all of the transmit signals stored in the enhancement database, the sending enhancement module may transmit the signals related to the desired analyte that are stored in the enhancement module, and/or the receiving enhancement module may implement the receiving antenna settings for the desired analyte which are stored in the enhancement database.
    Type: Grant
    Filed: March 15, 2024
    Date of Patent: November 3, 2026
    Assignee: KNOW LABS, INC.
    Inventor: John Cronin
  • Patent number: 12774965
    Abstract: In a sensor part of a dielectric spectrometry device, an antenna section of a coaxial line structure with an open end on a side that is to contact a sample, an open section of a coaxial line structure with an open end on a side that is to contact the air, a short section of a coaxial line structure in which a center conductor and a ground are conductive at a distal end portion, a load part which terminates a signal line, and a switch which selectively connects one of the antenna section, the open section, the short section, and the load part to a port of a reflection measurement instrument are formed on the same substrate.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: October 27, 2026
    Assignee: NTT, INC.
    Inventors: Takuro Tajima, Masahito Nakamura, Michiko Seyama
  • Patent number: 12774970
    Abstract: In various embodiments of the invention, a third circuit is used to adjust the splitting of two or more modes generated by a sample coil in a first circuit inductively coupled to a loop gap coil in a second circuit, where the splitting of the sample coil and the loop gap coil is adjusted to measure two or more nuclei in a high resolution nuclear magnetic resonance probe utilizing radio frequency signals. In various embodiments of the invention, the third circuit can either be electrically connected to the second circuit or alternatively inductively coupled to the second circuit.
    Type: Grant
    Filed: December 15, 2025
    Date of Patent: October 27, 2026
    Assignee: JEOL LTD
    Inventor: Albert Zens
  • Patent number: 12775024
    Abstract: Provided is a testing system and a testing method of using the same. The testing system includes a probe card for testing a device under test (DUT). The probe card includes: a space transformer; a circuit board over a first surface of the space transformer; and a probe head over a second surface of the space transformer. The probe head includes: a lower plate spaced from an upper plate by a spacer; at least two loopback probe pins respectively penetrating through the lower plate and the upper plate to carry a loopback test signal between at least two loopback bumps on the DUT; and a first shielding structure extending from a lower surface of the lower plate toward an upper surface of the DUT and horizontally disposed between the at least two loopback probe pins, wherein the first shielding structure is configured to have a ground voltage.
    Type: Grant
    Filed: November 21, 2024
    Date of Patent: October 27, 2026
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan Chun Chen, Shu An Shang, Guang-Sing Huang, Kai-Yi Tang, Hsiou-Yu He
  • Patent number: 12768881
    Abstract: The disclosure describes a novel method and apparatus for improving interposers to include embedded monitoring instruments for real time monitoring digital signals, analog signals, voltage signals and temperature sensors located in the interposer. An embedded monitor trigger unit controls the starting and stopping of the real time monitoring operations. The embedded monitoring instruments are accessible via an 1149.1 TAP interface on the interposer.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: October 20, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Patent number: 12761249
    Abstract: The present application provides a current monitoring device and a current monitoring method based on the current monitoring device. The current monitoring device includes: a magnetic ring, formed by a magnetic medium and having an air gap, the magnetic ring being used for being sleeved on a wire to be measured; a current sensor located in an air gap, a sensitive axis of the current sensor is parallel to tangent direction corresponding to center point projected by the current sensor on the magnetic ring, the current sensor including a magnetic sensing circuit having a magneto-resistive sensor, and the magnetic sensing circuit being used for outputting a first voltage signal which varies with a resistance value of the magneto-resistive sensor; a post-processing circuit is electrically connected to a current sensor. The post-processing circuit is used for analyzing a current of a wire to be measured according to a first voltage signal.
    Type: Grant
    Filed: July 19, 2024
    Date of Patent: October 13, 2026
    Assignee: Zhongshan Power Supply Bureau of Guangdong Power Grid Co Ltd.
    Inventors: Xiangfeng Zhou, Chunyuan Cai, Yongjian Li, Lifei Li, Weixia Jian, Yanhe Yin, Lei Liu, Zhenjiang Chen, Hua Li, Huibin Zhou, Shaoyan Jiang
  • Patent number: 12761259
    Abstract: A test system implemented method is for measuring the noise margin of a repeating signal under test (SUT). The method includes determining a digitizer noise of a digitizer channel of the test system, and applying the repeating SUT to the digitizer channel of the test system. An oversampled equivalent-time waveform representation of the repeating SUT is acquired, and then a filtered waveform representation is obtained. A noise margin om of the repeating SUT is determine in accordance with the equation ?m=(?c2+?i2??d2)1/2, where ?c is a standard deviation of a maximum amount of gaussian noise that can added to the filtered waveform representation without its symbol error rate (SER) exceeding a target value, ?i is a standard deviation of the digitizer noise, and ?d is a standard deviation of the noise components removed to obtain the filter waveform representation.
    Type: Grant
    Filed: August 23, 2024
    Date of Patent: October 13, 2026
    Assignee: KEYSIGHT TECHNOLOGIES, INC.
    Inventor: David Leyba
  • Patent number: 12758114
    Abstract: A non-invasive method for analyzing liquid implants in the deep anatomical planes of humans is described, which uses magnetic resonance imaging (MRI) spectroscopy combined with nuclear magnetic resonance (NMR) spectroscopy to obtain data on the structure and properties of the implanted material, making it possible to identify its origin, type and quantity in order to speed up interventions in the event of adverse events, or even for analysis and diagnostic purposes.
    Type: Grant
    Filed: May 3, 2024
    Date of Patent: October 13, 2026
    Inventors: Rodrigo Cadore Mafaldo, Danuza Dias Mafaldo, Elenilson De Godoy Alves Filho, Lorena Mara Alexandre E Silva
  • Patent number: 12761172
    Abstract: A method of measuring impedance, includes: providing an input voltage (Vin) across an impedance determination circuit comprising a first resistance (R1) and a known second resistance (R2) connected in series, the first resistance being switchable between a known first resistance and a dust build up resistance between a dust sensor and a process wall; switching the first resistance to the dust build up resistance; measuring an output voltage (Vo) across the second resistance or the dust build up resistance; and determining the dust build up resistance based on Vin, Vo, and R2.
    Type: Grant
    Filed: October 7, 2024
    Date of Patent: October 13, 2026
    Assignee: Dust Company, Inc.
    Inventor: Frederick E. Frantz
  • Patent number: 12742798
    Abstract: An example printed circuit board (PCB) with integrated current sense includes a direct current (DC) bus including a first DC trace and a second DC trace. The PCB with integrated current sense further includes a planar Rogowski coil positioned between the first DC trace and the second DC trace and electrically separated from the first DC trace and the second DC trace. The planar Rogowski coil can extend beyond an edge-to-edge distance between a first side edge and a second side edge of the first DC trace in a first direction. The planar Rogowski coil can further extend beyond an edge-to-edge distance between a first edge and a second edge of the second DC trace in the first direction.
    Type: Grant
    Filed: April 3, 2024
    Date of Patent: September 22, 2026
    Assignee: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.
    Inventors: Matthias Spieler, Dong Dong, Rolando Burgos
  • Patent number: 12710468
    Abstract: The present disclosure relates to a method and system of developing and executing a test program for verifying a device under test (DUT).
    Type: Grant
    Filed: March 28, 2024
    Date of Patent: August 18, 2026
    Assignee: MICROTEST S.P.A.
    Inventor: Giuseppe Amelio
  • Patent number: 12710486
    Abstract: A magnetic field sensor for detecting a magnetic field. The sensor includes a magneto-optical material, an excitation light source configured to emit excitation radiation for exciting electronic states of the magneto-optical material, a microwave source configured to generate an electromagnetic field for feeding a resonator structure, a detector configured to detect fluorescent radiation that the magneto-optical material may emit as a result of irradiation with the excitation radiation, a magnetic field generating apparatus arranged and configured to generate a permanent magnetic field in the region of the magneto-optical material, a resonator structure, arranged on a dielectric, configured to shape the electromagnetic field emitted by the microwave source in such a way that a microwave field is created that is suitable for manipulating spin states of the magneto-optical material.
    Type: Grant
    Filed: September 27, 2024
    Date of Patent: August 18, 2026
    Assignee: ROBERT BOSCH GMBH
    Inventors: Kai Worms, Julian Kassel, Andreas Brenneis, Florian Mauch
  • Patent number: 12704534
    Abstract: In a method for determining a superconducting impedance matched parametric amplifier, a center wavelength parameter, a gain parameter, and a bandwidth parameter of the superconducting impedance matched parametric amplifier are determined. An impedance value of an impedance matching line of the superconducting impedance matched parametric amplifier and a capacitance value of the amplifier are determined based on the wavelength parameter, the gain parameter, and the bandwidth parameter. A line width dimension of a coplanar waveguide of the superconducting impedance matched parametric amplifier is calculated based on the impedance value of the impedance matching line. A stub dimension of the superconducting impedance matched parametric amplifier is calculated based on the impedance value of the impedance matching line and the capacitance value of the amplifier.
    Type: Grant
    Filed: August 23, 2024
    Date of Patent: August 11, 2026
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Shuoming An, Maochun Dai, Jingjing Hu, Wenlong Zhang, Dengfeng Li, Shengyu Zhang
  • Patent number: 12699137
    Abstract: A test and measurement instrument includes one or more processors to acquire first, second, and third phase drive signals applied to a three-phase motor. A motor drive analyzer performs a direct-quadrature-zero, DQZ, transformation on the acquired first, second, and third phase drive signals to produce direct (D), quadrature (Q), and zero (Z) components, and generates an overlapped DQ phasor plot illustrating the D and Q components along with frequency domain representations of the D and Q components. The motor driver analyzer displays, on a user interface, the generated overlapped DQ phasor plot and an overlapped DQ spectra plot from the frequency domain representations of the D and Q components to enable a user to detect motor defects through visual characteristics of the overlapped DQ phasor and DQ spectra plots. The motor driver analyzer removes an offset and filters the D and Q components prior generating the overlapped DQ phasor plot.
    Type: Grant
    Filed: April 8, 2024
    Date of Patent: August 4, 2026
    Assignee: Tektronix, Inc.
    Inventors: Krishna N H Sri, Niranjan R Hegde, Shubha B, Christopher J. Loberg
  • Patent number: 12687583
    Abstract: A method, a battery management system, and an article of manufacture for testing a battery system are disclosed. The battery system can include a plurality of battery modules. A test process is performed with respect to the battery system via the battery management system that includes a controller device and a plurality of module interface devices. For each battery module of the plurality of battery modules, a respective module interface device of the plurality of module interface devices is operatively coupled to anode and cathode terminals of that battery module. Each module interface device can include a measurement circuit and a switching circuit. The test process can be used to independently connect, disconnect, and measure various operating conditions of the battery modules and load.
    Type: Grant
    Filed: July 31, 2024
    Date of Patent: July 21, 2026
    Assignee: The Boeing Company
    Inventors: Robert J. Atmur, Deborah A. Beron-Rawdon
  • Patent number: 12687575
    Abstract: One exemplary embodiment relates to a circuit which is integrated into a semiconductor substrate and which comprises a lateral field effect transistor having a drift region and a field plate electrode, which is isolated from the drift region by an isolation zone. The integrated circuit further comprises a first terminal, which is coupled to the field plate electrode, for applying a test voltage to the field plate electrode in a test operating mode. An electronic switch is configured to connect the field plate electrode to a circuit node that is at a reference voltage in a normal operating mode of the integrated circuit. The integrated circuit further comprises a second terminal, which is connected to a control terminal of the electronic switch and is configured to receive a control signal for switching on or off the electronic switch.
    Type: Grant
    Filed: December 22, 2023
    Date of Patent: July 21, 2026
    Assignee: Infineon Technologies AG
    Inventors: Till Schloesser, Axel Reithofer, Jens Barrenscheen
  • Patent number: 12681047
    Abstract: [Problem] The purpose of the present invention is to facilitate the insertion of a probe into two or more guide plates. [Solution] The present invention is provided with: a probe body 600 accommodated in a guide unit 30 for a probe card 1, the guide unit 30 comprising a first guide plate 301 and a second guide plate 302 disposed with a gap therebetween, and supported by a first guide hole 311 of the first guide plate 301 and a second guide hole 312 of the second guide plate 302; and a leader rod 610 that has a substantially linear shape with one end thereof connected to the probe body 600, that is inserted into the first guide hole 301 earlier than the probe body 600, and that can be separated from the probe body 600 after passing through the second guide hole 302.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: July 14, 2026
    Assignee: JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Kazuo Yokoyama, Masaya Inoue, Yuusuke Miyagawa
  • Patent number: 12681053
    Abstract: A sensor integrated circuit includes a sensing circuit configured to generate the sensor output signal and a fault circuit to detect a fault and generate a fault signal indicative of the fault. A combined signal indicative of the fault signal when a fault is detected and indicative of a reference voltage associated with the sensor IC at other times is provided at a shared connection of the sensor IC. Embodiments include a current sensor IC and fault detectors configured to detect one or more faults.
    Type: Grant
    Filed: February 2, 2024
    Date of Patent: July 14, 2026
    Assignee: Allegro MicroSystems, LLC
    Inventors: Matthew Hein, Benjamin Damkroger
  • Patent number: 12644918
    Abstract: A testing device for testing a high or medium-voltage cable comprises a circuit arrangement with a test voltage generator, which comprises a low voltage-side earthing input and a high voltage-side output and is designed to provide a variable test voltage, a test specimen connection for connecting the high voltage-side output to a conductor of the cable, a protective earth connector for connecting to protective earth, a connecting conductor which electrically connects the low-voltage-side earth input to the protective earth connector, so that the connecting conductor represents a current collection point through which a measuring current flows during the test, and a high-frequency signal pick-up at the current collection point, at which a high-frequency pre-location signal is generated based on the measuring current.
    Type: Grant
    Filed: March 19, 2024
    Date of Patent: June 2, 2026
    Assignee: b2 electronics GMbH
    Inventors: Stefan Baldauf, Christian Mathies, Joseph Kruijen