Patents Examined by Ronald E. Prass, Jr.
  • Patent number: 5646876
    Abstract: Rounding error can be reduced when evaluating binary floating point polynomials utilizing a Floating Point Unit (58) by first computing the sum of products of second and higher order polynomial terms. Next, the Floating Point Unit (58) adds a zero.sup.th level term to the product of a first order coefficient and an independent variable to form a "Big" term. The Floating Point Unit (58) calculates as a "Little" term the rounding error resulting from the computation of the "Big" term. The "Little" term is then added to the sum of products of higher order terms to form an "Intermediate" term. Finally, the Floating Point Unit (58) adds the "Big" term to the "Intermediate" term to form the polynomial result corrected by the rounding error introduced by the computation of the low order terms.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: July 8, 1997
    Assignee: Motorola, Inc.
    Inventor: Roger A. Smith
  • Patent number: 5617346
    Abstract: The present invention discloses a multiplication device. A multiplicand X of eight bits and a multiplier Y of eight bits are input and a product P of sixteen bits is found from these multiplication factors. MULTIPLICAND X is divided into two parts, an upper-order part X.sub.U of four bits and a low-order part X.sub.L of four bits. MULTIPLIER Y is likewise divided into two parts, an upper-order part Y.sub.U of four bits and a low-order part Y.sub.L of four bits. Thereafter, four 8-bit partial products, i.e., X.sub.L .times.Y.sub.L, X.sub.L .times.Y.sub.U, X.sub.U .times.Y.sub.L, and X.sub.U .times.Y.sub.U are computed one after another. These partial products are subjected to a digit place alignment addition operation, by an adder, to compute PRODUCT P. Computation of each of the partial products is implemented by performing addition of an approximate partial product AP retrieved by a 6-bit address from a 64-byte ROM, and a correction value H and a carry C generated by a correction value generator.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: April 1, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Genichiro Inoue
  • Patent number: 5615109
    Abstract: In a computer based inventory control method and system, feasible profit maximizing sets of requisitions are created. System processing starts with the creation of detailed, multi-dimensional forecasts of sales and cash receipts using stored algorithms and data preferentially extracted from a basic financial system and the adjustment of the forecasts to match the controlling forecast specified by the user. The adjustment of the forecasts is facilitated by the use of a calculated variable that defines the magnitude of the relative adjustment for each forecast element. All forecasts are adjusted to exactly match a controlling forecast which is either a multivalent combination of the previously generated forecasts or the user specified controlling forecast. The adjusted forecast of sales by item is then used in calculating a requisition set that satisfies expected demand while meeting user specified service level targets.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: March 25, 1997
    Inventor: Jeff Eder
  • Patent number: 5602767
    Abstract: The multiply/divide circuit uses an exclusive OR function of an ALU in a DSP. The result of the exclusive OR function through accumulators and shift registers which recycle the shifted signals back to the ALU, can be made to perform the multiply or divide function. When used in a DSP for telecommunication purposes, the multiply/divide circuit can perform convolution encoding and cyclic redundancy check, among other functions, specifically for the telecommunication application.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: February 11, 1997
    Assignee: TCSI Corporation
    Inventors: Gerhard P. Fettweis, Mihran Touriguian
  • Patent number: 5590036
    Abstract: When a piece of failure occurs, the associated-portion state data items of a relevant equipment and the relevant recovery sequence operated by an operator are recorded as a set of data. At this time, the associated-portion state data items which fall within a plurality of sets of data and which correspond to the same recovery sequence are grouped as the same recovery sequence group. Simultaneously, the common elements to the associated-portion state data items which fall within each recovery sequence group are extracted and recorded as the elements paired with the corresponding recovery sequence. Thereby, when a new piece of failure occurs, relevant associated-portion state data items are compared with the common elements. Then, regarding the associated-portion state data item which coincides with the common element, the corresponding recovery sequence is outputted to teach it to the operator as an available recovery sequence.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: December 31, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventor: Noboru Maeda