Patents Examined by Ronald Modo
-
Patent number: 10013373Abstract: In an embodiment of the invention, a method for to use a two level linked list descriptor mechanism to pass information among flash, memory, and IO controller modules is presented. The method includes creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA.Type: GrantFiled: November 6, 2016Date of Patent: July 3, 2018Assignee: BiTMICRO Networks, Inc.Inventors: Ricardo H. Bruce, Bernard Sherwin Leung Chiw, Margaret Anne Nadonga Somera
-
Patent number: 9971719Abstract: A system using a USB Type-C interface is provided. This system not only transmits the normal USB signal but also supports a DisplayPort Alternate Mode. Moreover, due to the novel pin arrangement of the multi-function control circuit, the cost of the overall system is reduced, and the area of the printed circuit board is effectively reduced.Type: GrantFiled: September 10, 2015Date of Patent: May 15, 2018Assignee: MEDIATEK INC.Inventors: Ching-Gu Pan, Tsung-Han Wu, Hsien-Sheng Huang
-
Patent number: 9952874Abstract: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.Type: GrantFiled: February 18, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden, Rokesh Jayasundar, Dung Q. Nguyen, David R. Terry
-
Patent number: 9921998Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.Type: GrantFiled: August 14, 2017Date of Patent: March 20, 2018Assignee: QUALCOMM IncorporatedInventors: Radu Pitigoi-Aron, Richard Dominic Wietfeldt, Douglas Wayne Hoffman
-
Patent number: 9921990Abstract: A SAS (Serial Attached SCSI or Serial Attached Small Computer System Interface) switch includes a master SAS expander and a multitude of slave expanders connected to the master SAS expander. Each slave expander has a distinct SAS address. The slave expanders are not directly connected to one another and communicate through the master expander. The SAS switch has a pair of SAS wide ports each having a multitude of SAS links each associated with one of the slave expanders. The slave expanders are configured to route SAS traffic in accordance with routing tables established by the master SAS expander. The master SAS expander is not directly connected to either of the SAS wide ports.Type: GrantFiled: September 4, 2015Date of Patent: March 20, 2018Assignee: Microsemi Solutions (U.S.), Inc.Inventor: Jiashu Lin
-
Patent number: 9916236Abstract: An information processing device includes a plurality of processors each of which is coupled to at least some of the plurality of processors. A first processor from among the plurality of processors is configured to calculate a plurality of communication paths between a second processor and a third processor from among the plurality of processors, identify a communication path that does not pass through a processor that is a target of dynamic reconfiguration, as a path to be used, from among the plurality of calculated communication paths, and transmit information on the identified path to be used, to a processor on the identified communication path. The processor that receives from the first processor the information on the identified path executes communication processing between the second processor and the third processor, by using the communication path that is indicated by the received information on the path to be used.Type: GrantFiled: April 30, 2015Date of Patent: March 13, 2018Assignee: FUJITSU LIMITEDInventors: Tomoyasu Takai, Tetsuya Kamino, Makoto Kozawa
-
Patent number: 9892075Abstract: An example method for facilitating policy-driven storage in a microserver computing environment is provided and includes receiving, at an input/output (I/O) adapter in a microserver chassis having a plurality of compute nodes and a shared storage resource, policy contexts prescribing storage access parameters of respective compute nodes and enforcing the respective policy contexts on I/O operations by the compute nodes, in which respect a particular I/O operation by any compute node is not executed if the respective policy context does not allow the particular I/O operation. The method further includes allocating tokens to command descriptors associated with I/O operations for accessing the shared storage resource, identifying a violation of any policy context of any compute node based on availability of the tokens, and throttling I/O operations by other compute nodes until the violation disappears.Type: GrantFiled: December 10, 2015Date of Patent: February 13, 2018Assignee: CISCO TECHNOLOGY, INC.Inventors: Prabhath Sajeepa, Sagar Borikar
-
Patent number: 9892064Abstract: Embodiments of the invention are directed to input devices configured for use with computing devices. The present invention relates to methods and devices for establishing, maintaining and managing, wireless connections between an input device and one or more host computing devices running one of a plurality of operating systems. The input device may be configured to analyze data received from the host computing devices to automatically or manually determine an operating system running on the host computing devices and configure the input device for proper functionality with the determined operating system.Type: GrantFiled: September 2, 2014Date of Patent: February 13, 2018Assignee: Logitech Europe S.A.Inventors: Jiri Holzbecher, Mathieu Meisser, Philippe Chazot, Ana Milosevic, Pascal Strahm, Olivier Dumont, Tzu-Pin Lin
-
Patent number: 9875177Abstract: An information processing device includes a plurality of processors each of which is coupled to at least some of the plurality of processors. A first processor from among the plurality of processors is configured to calculate a plurality of communication paths between a second processor and a third processor from among the plurality of processors, identify a communication path that does not pass through a processor that is a target of dynamic reconfiguration, as a path to be used, from among the plurality of calculated communication paths, and transmit information on the identified path to be used, to a processor on the identified communication path. The processor that receives from the first processor the information on the identified path executes communication processing between the second processor and the third processor, by using the communication path that is indicated by the received information on the path to be used.Type: GrantFiled: April 30, 2015Date of Patent: January 23, 2018Assignee: FUJITSU LIMITEDInventors: Tomoyasu Takai, Tetsuya Kamino, Makoto Kozawa
-
Patent number: 9852097Abstract: A USB hub includes a plurality of downstream ports; at least one dual mode port, the dual mode port configured to be switchable from a downstream port to an upstream port; and host detection circuitry for detecting whether, when operating as an upstream port, a host is connected.Type: GrantFiled: April 28, 2015Date of Patent: December 26, 2017Assignee: MICROCHIP TECHNOLOGY INCORPORATEDInventors: Brigham Steele, Atish Ghosh
-
Patent number: 9830289Abstract: Methods and apparatus for data aggregation and multiplexing of one or more virtual bus interfaces via a physical bus interface. Various disclosed embodiments are configured to: (i) multiplex multiple logical interfaces over a single physical interface, (ii) exchange session management and logical interface control, (iii) manage flow control, (iv) provide “hints” about the data (e.g., metadata), and/or (v) pad data packets. In one particular implementation, the methods and apparatus are configured for use within a wireless-enabled portable electronic device, such as for example a cellular-enabled smartphone, and make use of one or more features of a high-speed serialized physical bus interface.Type: GrantFiled: September 16, 2015Date of Patent: November 28, 2017Assignee: APPLE INC.Inventors: Radha Kumar Pulyala, Saurabh Garg, Karan Sanghi
-
Patent number: 9772965Abstract: A method includes generating, by a control unit of a first device, a handshaking signal to be transmitted to a second device via a second channel. The method further includes based on the handshaking signal being acknowledged by the second device, configuring, by the control unit, the second channel to communicate non-display data and configuring a first channel connecting the first device to the second device to selectively communicate either display data or non-display data; and based on the handshaking signal being not acknowledged by the second device, configuring, by the control unit, the first channel to communicate display data.Type: GrantFiled: March 14, 2014Date of Patent: September 26, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Brian Parten, Yoon Lee, Brian Quach, Lee Myers, Wesley Ray, Win Maung
-
Patent number: 9767048Abstract: A data processing system is provided which includes a processor nest communicatively coupled to an input/output bus by a bus controller, and a service interface controller communicatively coupled to the processor nest. The system includes storage for storing commands for the bus controller and associated command data and resulting status data, the storage being communicatively coupled to the processor nest and the bus controller. The service interface controller is configured, in response to received service commands, to read and write the storage, to execute the command specified in the storage, to retrieve the result of the command, and to store the result in the storage.Type: GrantFiled: September 23, 2015Date of Patent: September 19, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Norbert Hagspiel, Sascha Junghans, Matthias Klein, Joerg Walter
-
Patent number: 9767047Abstract: The embodiments are directed to methods and systems for sending and receiving signals between one or more peripheral devices connected to a dongle system and an operating system. The methods and systems can detect when a dongle system has been connected to a mobile computing device. The methods and systems can receive an input to use the dongle system with a local operating system or a remote operating system. The methods and systems can also establish a communication channel between the local operating system and the remote operating system, and exchange signals between the dongle system and the remote operating system using one or more virtual filters.Type: GrantFiled: October 3, 2014Date of Patent: September 19, 2017Assignee: Citrix Systems, Inc.Inventor: Jacob Summers
-
Patent number: 9740300Abstract: By causing information processing apparatuses belonging to a same group to be in a same state and transmitting operation information received from an input unit to the information processing apparatuses belonging to the same group simultaneously or approximately simultaneously, the operations of the information processing apparatuses belonging to the same group are synchronized with each other, and operation results received from the synchronized information processing apparatuses belonging to the same group are output by an output unit. In this way, the plurality of grouped information processing apparatuses can be simultaneously operated.Type: GrantFiled: September 4, 2014Date of Patent: August 22, 2017Assignee: FUJITSU LIMITEDInventor: Takahiro Konno
-
Patent number: 9734077Abstract: Method and apparatus for sending packets using optimized PIO write sequences without sfences. Sequences of Programmed Input/Output (PIO) write instructions to write packet data to a PIO send memory are received at a processor supporting out of order execution. The PIO write instructions are received in an original order and executed out of order, with each PIO write instruction writing a store unit of data to a store buffer or a store block of data to the store buffer. Logic is provided for the store buffer to detect when store blocks are filled, resulting in the data in those store blocks being drained via PCIe posted writes that are written to send blocks in the PIO send memory at addresses defined by the PIO write instructions. Logic is employed for detecting the fill size of packets and when a packet's send blocks have been filled, enabling the packet data to be eligible for egress.Type: GrantFiled: September 27, 2016Date of Patent: August 15, 2017Assignee: Intel CorporationInventors: Mark Debbage, Yatin M. Mutha
-
Patent number: 9734121Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.Type: GrantFiled: April 23, 2015Date of Patent: August 15, 2017Assignee: QUALCOMM IncorporatedInventors: Radu Pitigoi-Aron, Richard Dominic Wietfeldt, Douglas Wayne Hoffman
-
Patent number: 9723245Abstract: Provided are data transmitting apparatuses and methods, data receives apparatuses and methods, and data transceiving systems and methods. A data transmitting apparatus includes: a packet generator configured to generate an audio metadata packet; and a transmitter configured to transmit the generated audio metadata packet to a data receiving apparatus, wherein a header of the generated audio metadata packet includes a split screen information field in relation to audio data represented by the generated audio metadata packet.Type: GrantFiled: March 14, 2014Date of Patent: August 1, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyeong-jae Lee, Soo-young Kim, Jong-hwa Kim, Il-ju Na
-
Patent number: 9710196Abstract: A method of storing data using a first storage apparatus, a second storage apparatus, and a third storage apparatus coupled with each other through a network, includes as followings. The first storage apparatus receives a processing request of first data and second data. The first storage apparatus includes the first data as data to be addressed to the second storage apparatus, and the second data as data to be addressed to the third storage apparatus in one packet. The first storage apparatus transmits the one packet to the second storage apparatus. After transmitting the first data and the second data, the second storage apparatus transmits the second data to the third storage apparatus.Type: GrantFiled: January 23, 2015Date of Patent: July 18, 2017Assignee: FUJITSU LIMITEDInventor: Toshihiro Ozawa
-
Patent number: 9703738Abstract: A system and method for making and using a computing system framework with unified storage, processing, and network switching fabrics are provided. Processing nodes, either physical or virtual, are associated with intra-module ports, inter-module ports, and local storage spaces. A plurality of processing nodes are linked through intra-module ports to form processing modules. A plurality of the processing modules are connected through inter-module ports to form the computing system. Network switch can be incorporated into intra-module or inter-module connections. Several inter-module connection schemes, which can be adapted to use with existing network packet routing algorithms, are disclosed. Each processing node needs only to keep track of the states of its directly connected neighbors, obviating the need for a high-speed connection to the rest processing nodes within the system. Dedicated network switching equipment can be flexibly employed and network capacity grows naturally as processing nodes are added.Type: GrantFiled: October 10, 2014Date of Patent: July 11, 2017Assignee: Palo Alto Research Center IncorporatedInventor: Daniel Davies